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UC Berkeley Architecture Research

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  1. chipyard chipyard Public

    An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

    Scala 1.8k 702

  2. chiseltest chiseltest Public archive

    The batteries-included testing and formal verification library for Chisel-based RTL designs.

    Scala 232 76

  3. dsptools dsptools Public

    A Library of Chisel3 Tools for Digital Signal Processing

    Scala 237 39

  4. chisel-tutorial chisel-tutorial Public

    chisel tutorial exercises and answers

    Scala 723 198

Repositories

Showing 10 of 195 repositories
  • IsaacLab Public Forked from isaac-sim/IsaacLab

    Unified framework for robot learning built on NVIDIA Isaac Sim

    ucb-bar/IsaacLab’s past year of commit activity
    Python 0 1,690 0 0 Updated May 4, 2025
  • MaDa Public

    Agile FPGA SoC design with Chisel and Mill.

    ucb-bar/MaDa’s past year of commit activity
    Verilog 2 MIT 0 1 0 Updated May 4, 2025
  • saturn-vectors Public

    Chisel RISC-V Vector 1.0 Implementation

    ucb-bar/saturn-vectors’s past year of commit activity
    Assembly 96 BSD-3-Clause 9 2 0 Updated May 3, 2025
  • shuttle Public

    A Rocket-based RISC-V superscalar in-order core

    ucb-bar/shuttle’s past year of commit activity
    Scala 31 5 1 0 Updated May 2, 2025
  • tacit Public

    Timing Accurate Core Instruction Trace

    ucb-bar/tacit’s past year of commit activity
    Scala 0 0 0 0 Updated May 1, 2025
  • testchipip Public
    ucb-bar/testchipip’s past year of commit activity
    Scala 84 BSD-3-Clause 60 16 (2 issues need help) 4 Updated May 1, 2025
  • Accelerated-TinyMPC Public Forked from TinyMPC/TinyMPC

    Model-predictive control for microcontrollers (fork mapping tinyMPC to gemmini or other HW accelerators)

    ucb-bar/Accelerated-TinyMPC’s past year of commit activity
    C++ 6 MIT 107 0 0 Updated Apr 30, 2025
  • executorch Public Forked from pytorch/executorch

    On-device AI across mobile, embedded and edge for PyTorch

    ucb-bar/executorch’s past year of commit activity
    C++ 0 540 0 0 Updated Apr 29, 2025
  • chipyard Public

    An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

    ucb-bar/chipyard’s past year of commit activity
    Scala 1,826 BSD-3-Clause 702 156 (3 issues need help) 27 Updated Apr 28, 2025
  • hammer Public

    Hammer: Highly Agile Masks Made Effortlessly from RTL

    ucb-bar/hammer’s past year of commit activity
    Python 278 BSD-3-Clause 61 205 (5 issues need help) 18 Updated Apr 24, 2025
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