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RFC: [AIG] Add an AIG dialect and circt-synth #7717
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Since the developing of logic synthesis is really a non-trivial work, I wonder rather than using CIRCT to do the synthesis job by itself, how about exporting the aiger file directly, and then we can consume it by abc or mockturtle for future use. |
Implementing AIGER file exporter/importer is trivial once we lowered the IR to (low) AIG dialect (= That said even though I agree it's non-trivial to implement logic synthesizer but I believe it would be feasible to get OK results once we implemented necessary passes (Lower to FRAIG, Bit-sensitive IMCP/IMDCE, inlining, re-balancing). |
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Super exciting 😄 |
This is super exciting 🥳! I still have to look through the code in more detail. One question I had after a cursory look: is it beneficial to allow each operand in |
Inverting on operands would be more closer to traditional AIG format including AIGER (thank you for checking @fabianschuiki!) so the current representation seems to be right way to go. |
@@ -26,6 +26,7 @@ set(CIRCT_TEST_DEPENDS | |||
circt-dis | |||
circt-lec | |||
circt-opt | |||
circt-synth |
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This makes me unreasonably happy 🥳 😄
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This is seriously cool stuff! Can't wait to have this landed and be a starting point for optimizations, tech mapping, potential static timing analysis, etc. Really cool!
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A couple minor questions. This is awesome in general. The motivation and dialect boilerplate make sense to me. I skimmed through the new tool and the initial passes as well, and they make sense as a starting point. Looking forward to seeing more advanced integration here!
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Really cool to see this coming!
oldCutOutput->erase(); | ||
// Erase arguments before inlining. Arguments are already replaced. | ||
oldCutBlock->eraseArguments([](BlockArgument block) { return true; }); |
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I think these things should go through the rewriter and not be done directly on the op/block.
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Thank you for pointing out. oldCutOutput must be erased through rewriter but block arguments should be fine to erase directly. There is no API in rewriter to erase block arguments and upstream does the same (https://github.com/llvm/llvm-project/blob/a285ba7529feaa7c49890e314facb5e9f4d8dc11/mlir/lib/Conversion/TosaToSCF/TosaToSCF.cpp#L38-L39)
} | ||
if (!changed) | ||
return failure(); | ||
block->eraseArguments(eraseArgs); |
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Shouldn't this call and the one further down go through the rewriter?
@maerhart Thank you for really detailed review! and really sorry for a bunch of dirty code remaining in my PR. I'll make sure to double check basic stuffs before removing draft.. |
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Thank you really for detailed review @mikeurbach @fabianschuiki @maerhart! I'm going to merge basic stuffs in refined PRs/commits. I'll separate non-trivial passes (GreedyCutDecomp, CutToLUT) into a different PR for the ease of review. |
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This proposes AIG(And Inverter Graph) dialect which is meant to be a foundational dialect for logic synthesis.
Please see
docs/Dialects/AIG/RationaleAIG.md
andinclude/Diaclects/AIG/AIGOps.td
for design details.This PR implements E2E flow for FPGA synthesis with a naive implementation for LUT mapping (
test/circt-synth/lut-size.mlir
). Only comb.and/or/xor are supported as an input but it’s straightforward to implement a lowering for arithmetic ops. Right now comb.truth_table op is used as a target of LUT mapping.We probably still want Yosys integration (#7663) but CIRCT-native synthesizer would be worth doing in the long term.