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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,69 @@ | ||
| # REQUIRES: bindings_python | ||
| # RUN: %PYTHON% %s | FileCheck %s | ||
|
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| import circt | ||
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| from circt.dialects import rtg, rtgtest | ||
| from circt.ir import Context, Location, Module, InsertionPoint, Block, StringAttr, TypeAttr | ||
| from circt.passmanager import PassManager | ||
| from circt import rtgtool_support as rtgtool | ||
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| with Context() as ctx, Location.unknown(): | ||
| circt.register_dialects(ctx) | ||
| m = Module.create() | ||
| with InsertionPoint(m.body): | ||
| cpuTy = rtgtest.CPUType.get() | ||
| dictTy = rtg.DictType.get( | ||
| ctx, | ||
| [StringAttr.get('cpu0'), StringAttr.get('cpu1')], [cpuTy, cpuTy]) | ||
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| target = rtg.TargetOp('target_name', TypeAttr.get(dictTy)) | ||
| targetBlock = Block.create_at_start(target.bodyRegion, []) | ||
| with InsertionPoint(targetBlock): | ||
| cpu0 = rtgtest.CPUDeclOp(cpuTy, 0) | ||
| cpu1 = rtgtest.CPUDeclOp(cpuTy, 1) | ||
| rtg.YieldOp([cpu0, cpu1]) | ||
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| test = rtg.TestOp('test_name', TypeAttr.get(dictTy)) | ||
| Block.create_at_start(test.bodyRegion, [cpuTy, cpuTy]) | ||
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| # CHECK: rtg.target @target_name : !rtg.dict<cpu0: !rtgtest.cpu, cpu1: !rtgtest.cpu> { | ||
| # CHECK: [[V0:%.+]] = rtgtest.cpu_decl 0 | ||
| # CHECK: [[V1:%.+]] = rtgtest.cpu_decl 1 | ||
| # CHECK: rtg.yield [[V0]], [[V1]] : !rtgtest.cpu, !rtgtest.cpu | ||
| # CHECK: } | ||
| # CHECK: rtg.test @test_name : !rtg.dict<cpu0: !rtgtest.cpu, cpu1: !rtgtest.cpu> { | ||
| # CHECK: ^bb{{.*}}(%{{.*}}: !rtgtest.cpu, %{{.*}}: !rtgtest.cpu): | ||
| # CHECK: } | ||
| print(m) | ||
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| with Context() as ctx, Location.unknown(): | ||
| circt.register_dialects(ctx) | ||
| m = Module.create() | ||
| with InsertionPoint(m.body): | ||
| seq = rtg.SequenceOp('sequence_name') | ||
| Block.create_at_start(seq.bodyRegion, []) | ||
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| test = rtg.TestOp('test_name', TypeAttr.get(rtg.DictType.get())) | ||
| block = Block.create_at_start(test.bodyRegion, []) | ||
| with InsertionPoint(block): | ||
| seq_closure = rtg.SequenceClosureOp('sequence_name', []) | ||
| rtg.InvokeSequenceOp(seq_closure) | ||
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| # CHECK: rtg.test @test_name : !rtg.dict<> { | ||
| # CHECK-NEXT: rtg.sequence_closure | ||
| # CHECK-NEXT: rtg.invoke_sequence | ||
| # CHECK-NEXT: } | ||
| print(m) | ||
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| pm = PassManager() | ||
| options = rtgtool.Options( | ||
| output_format=rtgtool.OutputFormat.ELABORATED_MLIR, | ||
| debug_mode=True, | ||
| ) | ||
| rtgtool.populate_randomizer_pipeline(pm, options) | ||
| pm.run(m.operation) | ||
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| # CHECK: rtg.test @test_name : !rtg.dict<> { | ||
| # CHECK-NEXT: } | ||
| print(m) |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,62 @@ | ||
| //===- RTGModule.cpp - RTG API pybind module ------------------------------===// | ||
| // | ||
| // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
| // See https://llvm.org/LICENSE.txt for license information. | ||
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
| // | ||
| //===----------------------------------------------------------------------===// | ||
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| #include "CIRCTModules.h" | ||
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| #include "circt-c/Dialect/RTG.h" | ||
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| #include "mlir/Bindings/Python/PybindAdaptors.h" | ||
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| #include <pybind11/pybind11.h> | ||
| #include <pybind11/pytypes.h> | ||
| #include <pybind11/stl.h> | ||
| namespace py = pybind11; | ||
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| using namespace circt; | ||
| using namespace mlir::python::adaptors; | ||
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| /// Populate the rtg python module. | ||
| void circt::python::populateDialectRTGSubmodule(py::module &m) { | ||
| m.doc() = "RTG dialect Python native extension"; | ||
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| mlir_type_subclass(m, "SequenceType", rtgTypeIsASequence) | ||
| .def_classmethod( | ||
| "get", | ||
| [](py::object cls, MlirContext ctxt) { | ||
| return cls(rtgSequenceTypeGet(ctxt)); | ||
| }, | ||
| py::arg("self"), py::arg("ctxt") = nullptr); | ||
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| mlir_type_subclass(m, "SetType", rtgTypeIsASet) | ||
| .def_classmethod( | ||
| "get", | ||
| [](py::object cls, MlirType elementType) { | ||
| return cls(rtgSetTypeGet(elementType)); | ||
| }, | ||
| py::arg("self"), py::arg("element_type")); | ||
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| mlir_type_subclass(m, "DictType", rtgTypeIsADict) | ||
| .def_classmethod( | ||
| "get", | ||
| [](py::object cls, MlirContext ctxt, py::list entryNames, | ||
| py::list entryTypes) { | ||
| std::vector<MlirAttribute> names; | ||
| std::vector<MlirType> types; | ||
| for (auto type : entryNames) | ||
| names.push_back(type.cast<MlirAttribute>()); | ||
| for (auto type : entryTypes) | ||
| types.push_back(type.cast<MlirType>()); | ||
| assert(names.size() == types.size() && | ||
| "number of entry names and entry types must match"); | ||
| return cls( | ||
| rtgDictTypeGet(ctxt, types.size(), names.data(), types.data())); | ||
| }, | ||
| py::arg("self"), py::arg("ctxt") = nullptr, | ||
| py::arg("entry_names") = py::list(), | ||
| py::arg("entry_types") = py::list()); | ||
| } |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,34 @@ | ||
| //===- RTGTestModule.cpp - RTGTest API pybind module ----------------------===// | ||
| // | ||
| // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
| // See https://llvm.org/LICENSE.txt for license information. | ||
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
| // | ||
| //===----------------------------------------------------------------------===// | ||
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| #include "CIRCTModules.h" | ||
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| #include "circt-c/Dialect/RTGTest.h" | ||
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| #include "mlir/Bindings/Python/PybindAdaptors.h" | ||
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| #include <pybind11/pybind11.h> | ||
| #include <pybind11/pytypes.h> | ||
| #include <pybind11/stl.h> | ||
| namespace py = pybind11; | ||
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| using namespace circt; | ||
| using namespace mlir::python::adaptors; | ||
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| /// Populate the rtgtest python module. | ||
| void circt::python::populateDialectRTGTestSubmodule(py::module &m) { | ||
| m.doc() = "RTGTest dialect Python native extension"; | ||
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| mlir_type_subclass(m, "CPUType", rtgtestTypeIsACPU) | ||
| .def_classmethod( | ||
| "get", | ||
| [](py::object cls, MlirContext ctxt) { | ||
| return cls(rtgtestCPUTypeGet(ctxt)); | ||
| }, | ||
| py::arg("self"), py::arg("ctxt") = nullptr); | ||
| } |
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