Add Xilinx Kintex UltraScale+ KCU116 board #96
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This commit adds the Xilinx Kintex UltraScale+ KCU116 board featuring the XCKU5P-2FFVB676E FPGA and 4 zSFP cages. XGMII PHYs are instantiated for all four cages in `fpga.v` and passed down to `fpga_core.v`. Only the first (SFP 0) cage is connected to the instantiated UDP/IP core. The I2C bus to the SFPs uses an I2C mux chip and is currently unsupported. The reference clock for the GTY transceiver connected to the SFPs is generated by an external, on-board Si5328 clock chip which must be configured to output a clock signal of 156.25MHz before the transceiver can be used. This configuration is performed through the onboard Zynq-based baseboard management controller. Software for configuring the Zynq BMC and setting the proper clock frequencies can be found on Xilinx' website.
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This commit adds the Xilinx Kintex UltraScale+ KCU116 board featuring the XCKU5P-2FFVB676E FPGA and 4 zSFP cages. XGMII PHYs are instantiated for all four cages in
fpga.vand passed down tofpga_core.v. Only the first (SFP 0) cage is connected to the instantiated UDP/IP core.The I2C bus to the SFPs uses an I2C mux chip and is currently unsupported.
The reference clock for the GTY transceiver connected to the SFPs is generated by an external, on-board Si5328 clock chip which must be configured to output a clock signal of 156.25MHz before the transceiver can be used. This configuration is performed through the onboard Zynq-based baseboard management controller. Software for configuring the Zynq BMC and setting the proper clock frequencies can be found on Xilinx' website.
TODOs
Currently, SFP2 and SFP3 don't work yet. Furthermore, optical modules don't seem to work yet.Turns out my SFP+ was broken. It now works on all ports with DACs, Singlemode and Multimode.Inclusion in verilog-ethernet
@alexforencich I've seen in some other PRs that you are not willing to accept pull requests for hardware you don't have access to. Maybe you by chance have access to this board. Unfortunately, I'm not at the liberty of donating any hardware. In case you don't want this include in the mainline
verilog-ethernettree, can you create a subdirectory or another repository for untested hardware. It seems like having support for boards like these can greatly help in getting started, even if they aren't guaranteed to work.