🧮 Pipelined ZanPU

Pipelined ZanPU is a simple implementation of a classic five stage RISC pipeline CPU.

This project is the team project of BIT's 2019 summer CPU-building lecture. ZanPU's architecture shares the one mentioned in: Classic RISC pipeline - Wikipedia.

Usage

• Open Vivado
• Run sythesis, implementation
• Program board
• Profit.

Source Code

All source codes are available at pipelined-zanpu.srcs.

• Design Sources
• Simulation Sources

Instruction, data memory and register files are initialized at pipelined-zanpu.tbcode.

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🧮 Pipelined ZanPU ©2019 ZanPU. Released under the MIT License.

Authored and maintained by Team ZanPU.

Created with love ♥ from BIT, Beijing.

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