Merge pull request #1115 from grebe/single_element_array

Update handling of single-element arrays.

ivtest/ivltests/single_element_array.v

@@ -0,0 +1,31 @@
+module SingleElementArray(
+  input wire [48:0] x1,
+  output wire [48:0] out
+);
+  wire [48:0] x17[0:0];
+  assign x17[0] = x1;
+  assign out = {x17[0]};
+endmodule
+
+module testbench;
+  reg [48:0] in;
+  wire [48:0] out;
+
+  SingleElementArray dut(.x1(in), .out(out));
+
+  initial begin
+    in = 49'h0000000000000;
+    #1;
+    if (out != 49'h0000000000000) begin
+      $display("FAILED");
+      $finish;
+    end
+    in = 49'h1555555555555;
+    #1;
+    if (out != 49'h1555555555555) begin
+      $display("FAILED");
+      $finish;
+    end
+    $display("PASSED");
+  end
+endmodule

ivtest/regress-vvp.list

@@ -173,6 +173,7 @@ sf_countones_fail		vvp_tests/sf_countones_fail.json
 sf_isunknown_fail		vvp_tests/sf_isunknown_fail.json
 sf_onehot_fail			vvp_tests/sf_onehot_fail.json
 sf_onehot0_fail			vvp_tests/sf_onehot0_fail.json
+single_element_array 		vvp_tests/single_element_array.json
 struct_enum_partsel		vvp_tests/struct_enum_partsel.json
 struct_field_left_right		vvp_tests/struct_field_left_right.json
 struct_nested1			vvp_tests/struct_nested1.json

ivtest/vvp_tests/single_element_array.json

@@ -0,0 +1,4 @@
+{
+    "type"   : "normal",
+    "source" : "single_element_array.v"
+}

tgt-vvp/vvp_scope.c

@@ -689,21 +689,21 @@ static void draw_net_in_scope(ivl_signal_t sig)
 		  nex_data->net_word = iword;
 
 	    } else if (dimensions > 0) {
-
 		    /* In this case, we have an alias to an existing
 		       signal array. this typically is an instance of
 		       port collapsing that the elaborator combined to
 		       discover that the entire array can be collapsed,
 		       so the word count for the signal and the alias
 		       *must* match. */
 
-		  if (word_count == ivl_signal_array_count(nex_data->net)) {
-		    if (iword == 0) {
+		  if (ivl_signal_dimensions(nex_data->net) > 0 &&
+                      word_count == ivl_signal_array_count(nex_data->net)) {
+                    if (iword == 0) {
 		      fprintf(vvp_out, "v%p .array \"%s\", v%p; Alias to %s \n",
 			      sig, vvp_mangle_name(ivl_signal_basename(sig)),
 			      nex_data->net,
 			      ivl_signal_basename(nex_data->net));
-		    }
+                    }
 		    /* An alias for an individual word. */
 		  } else {
 			if (iword == 0) {