openhcl_boot: Serial output in the boot shim in SNP

Cargo.lock

@@ -4811,6 +4811,7 @@ version = "0.0.0"
 dependencies = [
  "aarch64defs",
  "arrayvec",
+ "bitfield-struct 0.10.1",
  "cfg-if",
  "crc32fast",
  "fdt",

openhcl/openhcl_boot/Cargo.toml

@@ -8,6 +8,7 @@ rust-version.workspace = true
 
 [dependencies]
 aarch64defs.workspace = true
+bitfield-struct.workspace = true
 minimal_rt.workspace = true
 underhill_confidentiality.workspace = true
 host_fdt_parser.workspace = true

openhcl/openhcl_boot/src/arch/aarch64/mod.rs

@@ -10,12 +10,17 @@ mod memory;
 mod vp;
 mod vsm;
 
+use crate::host_params::shim_params::ShimParams;
 pub use memory::physical_address_bits;
 pub use memory::setup_vtl2_memory;
 pub use memory::verify_imported_regions_hash;
 pub use vp::setup_vtl2_vp;
 pub use vsm::get_isolation_type;
 
+pub fn initialize(_: &ShimParams) {}
+
+pub fn uninitialize(_: &ShimParams) {}
+
 // Entry point.
 #[cfg(minimal_rt)]
 core::arch::global_asm! {

openhcl/openhcl_boot/src/arch/x86_64/address_space.rs

@@ -24,21 +24,21 @@ use zerocopy::Immutable;
 use zerocopy::IntoBytes;
 use zerocopy::KnownLayout;
 
-const X64_PTE_PRESENT: u64 = 1;
-const X64_PTE_READ_WRITE: u64 = 1 << 1;
-const X64_PTE_ACCESSED: u64 = 1 << 5;
+pub const X64_PTE_PRESENT: u64 = 1;
+pub const X64_PTE_READ_WRITE: u64 = 1 << 1;
+pub const X64_PTE_ACCESSED: u64 = 1 << 5;
 const X64_PTE_DIRTY: u64 = 1 << 6;
 const X64_PTE_LARGE_PAGE: u64 = 1 << 7;
-const X64_PTE_CONFIDENTIAL: u64 = 1 << 51;
+pub const X64_PTE_CONFIDENTIAL: u64 = 1 << 51;
 
-const PAGE_TABLE_ENTRY_COUNT: usize = 512;
+pub const PAGE_TABLE_ENTRY_COUNT: usize = 512;
 
-const X64_PAGE_SHIFT: u64 = 12;
-const X64_PTE_BITS: u64 = 9;
+pub const X64_PAGE_SHIFT: u64 = 12;
+pub const X64_PTE_BITS: u64 = 9;
 
 #[derive(Debug, IntoBytes, Immutable, KnownLayout, FromBytes)]
 #[repr(transparent)]
-struct PageTableEntry {
+pub struct PageTableEntry {
     entry: u64,
 }
 #[derive(Debug, Copy, Clone)]
@@ -105,7 +105,7 @@ impl PageTableEntry {
 
 #[repr(C)]
 #[derive(Debug, IntoBytes, Immutable, KnownLayout, FromBytes)]
-struct PageTable {
+pub struct PageTable {
     entries: [PageTableEntry; PAGE_TABLE_ENTRY_COUNT],
 }
 

openhcl/openhcl_boot/src/arch/x86_64/mod.rs

@@ -14,6 +14,7 @@ mod vp;
 mod vsm;
 
 use crate::host_params::shim_params::IsolationType;
+use crate::host_params::shim_params::ShimParams;
 pub use memory::setup_vtl2_memory;
 pub use memory::verify_imported_regions_hash;
 use safe_intrinsics::cpuid;
@@ -39,6 +40,18 @@ pub fn physical_address_bits(isolation: IsolationType) -> u8 {
     }
 }
 
+pub fn initialize(p: &ShimParams) {
+    if p.isolation_type == IsolationType::Snp {
+        snp::Ghcb::initialize();
+    }
+}
+
+pub fn uninitialize(p: &ShimParams) {
+    if p.isolation_type == IsolationType::Snp {
+        snp::Ghcb::uninitialize();
+    }
+}
+
 // Entry point.
 #[cfg(minimal_rt)]
 core::arch::global_asm! {