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Hello alex,
First, I want to express my sincere thankful to your work. That's a really good work !
Second, can you explain why you use UDP/IPV4 as ETHERNET frame ? I don't know what the AXI interface on kit FPGA can be seen as ? And I have seen your project on kit Arrty A7.
Thanks a lot !
The text was updated successfully, but these errors were encountered:
Hello alex,
First, I want to express my sincere thankful to your work. That's a really good work !
Second, can you explain why you use UDP/IPV4 as ETHERNET frame ? I don't know what the AXI interface on kit FPGA can be seen as ? And I have seen your project on kit Arrty A7.
Thanks a lot !
The text was updated successfully, but these errors were encountered: