eth_mac_phy_10g_fifo missing external serdes_rx_reset_req?

[rconraduw]

I'm following your example design for the ZCU102 with 10G to adapt for another board. I noticed that you connected the eth_xcvr_gt_full-reset_rx_datapath_in to the serdes_rx_reset_req out from the eth_phy_10g. I'm trying to use the eth_mac_phy_10g_fifo.v in place of the eth_phy_10g + eth_mac_10g and see that in that instance you didn't bring to serdes_rx_reset_req out to the top in order to connect to the gt-reset_rx_datapath. Is this a mistake in the eth_mac_phy_10g or is there a better reset signal to tie the gt-reset_rx_datapath in this configuration?

Thanks.

[alexforencich]

Oops, looks like I forgot to add that signal when I added it to the PHY. Thanks for letting me know, it's now fixed in the repo.

[rconraduw]

Thanks for the quick response!

[yohayCF]

Hi Alex,
I'm trying to run the 10G example on the ZCU102, and two files are missing. The first one is the above file, and 2'nd is the eth_xcvr_gt_channel.
Can you please add both of them?
Thanks

[alexforencich]

That was a signal, not a module, and I think the problem is solved now. For the GT core, that's generated by a TCL script, just source the script to generate the core.

[yohayCF]

Got it.
Thanks Alex for your fast response