Branch if equals implementation #27
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TheDeepestSpace
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Apr 5, 2025
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| `include "src/types.svh" | ||
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| module extend ( input wire [11:0] in | ||
| , output imm_t imm_ext | ||
| ); | ||
| assign imm_ext = {{20{in[11]}}, in}; | ||
| endmodule |
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This file was added in #20, remove it since we are no longer using it (the logic is part of InstructionDecode)
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This PR contains the implementation of
beqinstruction. It is built off of the unconditional branching setup in #20 .This is a significant PR since it starts to integrate together our main modules:
InstructionDecode,ControlFSM,fetch, andALU.This is the first attempt at integration and only wires up the signals necessary for
beq.This is a pretty large PR, so I would not be opposed to breaking it up into smaller chunks, especially since there have been quite a bit of peripheral changes.
Notable changes aside from the integration in
top.v:ALUOpsignal as per the bookPCUpdateis set toTRUEunconditionallyPCSrcsignal to pick the next PC valueImmExtfrom Instruction Decode for consumption by the Fetch modulebeqcan be performed in one cycle