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stm32: tests: drivers : fix mpu faults by enabling SRAM clocks and configuring MPU regions on stm32h7rsx #97731

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Merged
merged 2 commits into from
Oct 22, 2025
Merged

stm32: tests: drivers : fix mpu faults by enabling SRAM clocks and configuring MPU regions on stm32h7rsx #97731

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815ea69
drivers: clock_control: stm32: enable clocks for SRAM1 and SRAM2
djiatsaf-st Oct 16, 2025
8c0e426
dts: arm: st: h7rs: Add zephyr,memory-attr to SRAM1 and SRAM2 regions
djiatsaf-st Oct 17, 2025
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8 changes: 8 additions & 0 deletions drivers/clock_control/clock_stm32_ll_h7.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1040,6 +1040,14 @@ int stm32_clock_control_init(const struct device *dev)
#endif
z_stm32_hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_DEFAULT_RETRY);

#if defined(CONFIG_SOC_SERIES_STM32H7RSX)
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sram1))
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_AHBSRAM1);
#endif
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sram2))
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_AHBSRAM2);
#endif
#endif
/* Set up individual enabled clocks */
set_up_fixed_clock_sources();

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6 changes: 6 additions & 0 deletions dts/arm/st/h7rs/stm32h7rs.dtsi
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Expand Up @@ -60,13 +60,19 @@
reg = <0x30000000 DT_SIZE_K(16)>;
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM1";
zephyr,memory-attr = <DT_MEM_ARM(ATTR_MPU_RAM)>;
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Should sram1 mapping attributes also be set by the system overlay, or at least the board?

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I previously did that https://github.com/zephyrproject-rtos/zephyr/pull/97731#discussion_r2436709223 but is better to do it this way unless there is a conflict, such as with SRAM2

};

/* System data RAM accessible over AHB bus: SRAM2 in D2 domain */
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Make SRAM2 status = "disabled"; by default and add comment that zephyr,memory-attr must be added explicitly for the SRAM to be accessible.

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Done

sram2: memory@30004000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x30004000 DT_SIZE_K(16)>;
zephyr,memory-region = "SRAM2";
/* Disable SRAM2 by default to avoid unintended access.
* To enable it, explicitly define zephyr,memory-attr
* to configure MPU attributes.
*/
status = "disabled";
};

dtcm: memory@20000000 {
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10 changes: 10 additions & 0 deletions tests/drivers/memc/ram/boards/stm32h7s78_dk.overlay
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@@ -0,0 +1,10 @@
/*
* Copyright (c) 2025 STMicroelectronics
*
* SPDX-License-Identifier: Apache-2.0
*/

&sram2 {
zephyr,memory-attr = <DT_MEM_ARM(ATTR_MPU_RAM)>;
status = "okay";
};