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Use correct VTOR_NS location when TrustZone enabled#580

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danielinux merged 4 commits intowolfSSL:masterfrom
mattia-moffa:20250702-vtor-ns
Jul 9, 2025
Merged

Use correct VTOR_NS location when TrustZone enabled#580
danielinux merged 4 commits intowolfSSL:masterfrom
mattia-moffa:20250702-vtor-ns

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@mattia-moffa
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Fixes a regression introduced in 6681e54 which sets VTOR to 0xE000ED08 (VTOR) rather than 0xE002ED08 (VTOR_NS) when TrustZone is enabled. Issue found by Daniele while I was debugging wolfBoot on the STM32H5 for ZD#20037. Will ask them to verify whether this fixes their first problem.

Fixes regression introduced in 6681e54
@mattia-moffa mattia-moffa self-assigned this Jul 2, 2025
This is needed to accommodate for the ARM Cortex-M33 interrupt vector
alignment requirements. The number of interrupts on the STM32H5 is 149;
the next power of 2 is 256; in bytes, that is 1024.
@mattia-moffa
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This last commit restores the functionality of the UART console on my side. The issue was a misalignment of the interrupt vector table of the boot image. According to the ARM Cortex-M33 documentation:

The silicon vendor must configure the required alignment of the vector tables, which depends on the number of interrupts implemented. The minimum alignment is 32 words, enough for up to 16 interrupts. For more interrupts, adjust the alignment by rounding up to the next power of two. For example, if you require 21 interrupts, the alignment must be on a 64-word boundary because the required table size is 37 words, and the next power of two is 64.

The STM32H5 has 149 (133 + 16) interrupts; the next power of two is 256 words, i.e. 1024 bytes. The default image header size was previously 256 bytes, causing the interrupt vector to be 256-aligned and the ISR used for UART to be offset in respect to the correct one.

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@dgarske dgarske left a comment

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Looks great otherwise.

@danielinux danielinux merged commit b897746 into wolfSSL:master Jul 9, 2025
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3 participants