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| Original file line number | Diff line number | Diff line change |
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| # Vllink Basic2配套FPGA接口转接板 | ||
|
|
||
| ## 示意图 | ||
|  | ||
| * 从左到右依次为： | ||
| 1. DC3母座，接上Vllink Basic2调试器 | ||
| 2. 10P 2.00 JTAG牛角座 | ||
| 3. 10P 2.54 JTAG牛角座 | ||
| 4. 14P 2.54 JTAG牛角座 | ||
|
|
||
| ## 原理图 | ||
|  | ||
| * 原则上，在作为FPGA下载器使用时，务必先将VRef调整至`0V`即外部参考电压模式 | ||
|
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| ## 全套设计文件 | ||
| * [interface_basic2_to_fpga.zip](../_static/pcbs/interface_basic2_to_fpga.zip) |
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| <h1>Vllink Basic2配套FPGA接口转接板<a class="headerlink" href="#vllink-basic2fpga" title="Permalink to this heading"></a></h1> | ||
| <section id="id1"> | ||
| <h2>示意图<a class="headerlink" href="#id1" title="Permalink to this heading"></a></h2> | ||
| <p><img alt="" src="../_images/interface_basic2_to_fpga.png" /></p> | ||
| <ul class="simple"> | ||
| <li><p>从左到右依次为：</p> | ||
| <ol class="arabic simple"> | ||
| <li><p>DC3母座，接上Vllink Basic2调试器</p></li> | ||
| <li><p>10P 2.00 JTAG牛角座</p></li> | ||
| <li><p>10P 2.54 JTAG牛角座</p></li> | ||
| <li><p>14P 2.54 JTAG牛角座</p></li> | ||
| </ol> | ||
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| <h2>原理图<a class="headerlink" href="#id2" title="Permalink to this heading"></a></h2> | ||
| <p><img alt="" src="../_images/interface_basic2_to_fpga.sch.png" /></p> | ||
| <ul class="simple"> | ||
| <li><p>原则上，在作为FPGA下载器使用时，务必先将VRef调整至<code class="docutils literal notranslate"><span class="pre">0V</span></code>即外部参考电压模式</p></li> | ||
| </ul> | ||
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| <h2>全套设计文件<a class="headerlink" href="#id3" title="Permalink to this heading"></a></h2> | ||
| <ul class="simple"> | ||
| <li><p><a class="reference download internal" download="" href="../_downloads/141cf642e5af5a218a1c58c8e4c35907/interface_basic2_to_fpga.zip"><span class="xref download myst">interface_basic2_to_fpga.zip</span></a></p></li> | ||
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