Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

OpenROAD GSoC 2025 #718

Draft
wants to merge 4 commits into
base: main
Choose a base branch
from
Draft
Show file tree
Hide file tree
Changes from 3 commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
14 changes: 7 additions & 7 deletions content/authors/luarss/_index.md
Original file line number Diff line number Diff line change
Expand Up @@ -10,14 +10,12 @@ authors:
superuser: false

# Role/position
role: "Student at National University of Singapore"
role: "Individual Contributor"

# Organizations/Affiliations
organizations:
- name: School of Computing
url: "https://www.comp.nus.edu.sg/"
- name: National University of Singapore
url: "https://nus.edu.sg/"
- name: Precision Innovations
url: https://precisioninno.com/


# Short bio (displayed in user profile at end of posts)
Expand All @@ -30,7 +28,7 @@ bio:
social:
- icon: envelope
icon_pack: fas
link: mailto:espsluar@gmail.com
link: mailto:jluar@precisioninno.com
- icon: linkedin
icon_pack: fab
link: https://www.linkedin.com/in/song-luar
Expand All @@ -45,4 +43,6 @@ user_groups:
- 2023 Contributors
- University of California Mentors
---
Jack is a Masters graduate from the National University of Singapore. Key interests are in open-source Electronic Design Automation (EDA) and applying AI for Very Large Scale Integration (VLSI) design optimisation.
Jack is a Masters graduate from the National University of Singapore. Key interests are in open-source Electronic Design Automation (EDA) and applying AI for Very Large Scale Integration (VLSI) design optimisation.

In GSoC 2024, he mentored two students and shipped the [ORAssistant](https://github.com/The-OpenROAD-Project/ORAssistant) project, a conversational chatbot meant to answer queries about OpenROAD and the OpenROAD-flow-scripts suite.
Loading
Sorry, something went wrong. Reload?
Sorry, we cannot display this file.
Sorry, this file is invalid so it cannot be displayed.
35 changes: 35 additions & 0 deletions content/project/osre25/openroad/openroad/index.md
Original file line number Diff line number Diff line change
@@ -0,0 +1,35 @@
---
title: "OpenROAD - An Open-Source, Autonomous RTL-GDSII Flow for Chip Design"
authors: [luarss]
author_notes: ["Individual Contributor at Precision Innovations"]
tags: ["osre24", "ucsd", "uc", "chip design", "asicdesign", "llm", "ml", "ai"]
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Please change osre24 to osre25

date: 2025-01-19
---

The [OpenROAD](https://theopenroadproject.org) project is a non-profit project, originally funded by DARPA with the aim of creating open-source EDA tools; an Autonomous flow from RTL-GDSII that completes < 24 hrs, to lower cost and boost innovation in IC design. This project is now supported by [Precision Innovations](precisioninno.com).

OpenROAD massively scales and supports EWD (Education and Workforce Development) and supports a broad ecosystem making it a vital tool that supports a rapidly growing Semiconductor Industry.

OpenROAD is the fastest onramp to gain knowledge, skills and create pathways for great career opportunities in chip design. You will develop important software and hardware design skills by contributing to these interesting projects. You will also have the opportunity to work with mentors from the OpenROAD project and other industry experts.

We welcome a diverse community of designers, researchers, enthusiasts, software engineers and entrepreneurs to use and contribute to OpenROAD and make a far-reaching impact in the rapidly growing, global Semiconductor Industry.

### ORAssistant - LLM Data Engineering and Testing

* **Topics**: `Large Language Model`, `Machine Learning`, `Data Engineering`, `Model Deployment`, `Testing`
* **Skills**: large language model engineering, database, evaluation, CI/CD, open-source or related software development
* **Difficulty**: Medium
* **Size**: Medium (175 hours)
* **Mentor**: Jack Luar

This project is aimed at enhancing robustness and accuracy for OR Assistant. the conversational assistant for OpenROAD through comprehensive testing and evaluation. You will work with members of the OpenROAD team and other researchers to enhance the existing dataset to cover a wide range of use cases to deliver accurate responses more efficiently. This project will focus on data engineering and benchmarking and you will collaborate on a project on the LLM model engineering. Tasks include: creating evaluation pipelines, building databases to gather feedback, and improving CI/CD (non-exhaustive), writing documentation. You will gain valuable experience and skills in understanding chip design flows and applications. Open to proposals from all levels of ML practitioners.

### ORAssistant - LLM Model Engineering

* **Topics**: `Large Language Model`, `Machine Learning`, `Model Architecture`, `Model Deployment`
* **Skills**: large language model engineering, prompt engineering, fine-tuning
* **Difficulty**: Medium
* **Size**: Medium (175 hours)
* **Mentor**: Jack Luar

This project is aimed at enhancing robustness and accuracy for OR Assistant, the conversational assistant for OpenROAD through enhanced model architectures. You will work with members of the OpenROAD team and other researchers to explore alternate architectures beyond the existing RAG-based implementation. This project will focus on improving reliability and accuracy of the existing model architecture. You will collaborate on a tandem project on data engineering for OR assistant. Tasks include: reviewing and understanding the state-of-the-art in retrieval augmented generation, implementing best practices, caching prompts, improving relevance and accuracy metrics (non-exhaustive), writing documentation. You will gain valuable experience and skills in understanding chip design flows and applications. Open to proposals from all levels of ML practitioners.