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Fixed timing tests and added no io tests option
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transistorfet committed Apr 8, 2024
1 parent 1c5ad39 commit 471695a
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Showing 2 changed files with 40 additions and 34 deletions.
46 changes: 23 additions & 23 deletions tests/rad_tests/latest.txt
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@@ -1,4 +1,4 @@
Last run on 2024-03-31 at commit 6e7e315808228e03eaf8ad2e8152c087710f1d28 with flags --check-undocumented --check-timings
Last run on 2024-04-07 at commit 1c5ad3999afa5591ec8fcbcadf4797514c390031 with flags --check-undocumented --check-timings

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passed: 1584670, failed: 25330, total 98%
completed in 0m 8s
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completed in 0m 9s
28 changes: 17 additions & 11 deletions tests/rad_tests/src/main.rs
Original file line number Diff line number Diff line change
Expand Up @@ -46,6 +46,9 @@ struct Args {
/// Check instruction timings
#[clap(short = 't', long)]
check_timings: bool,
/// Don't check I/O instructions
#[clap(short = 'i', long)]
no_check_io: bool,
/// Directory to the test suite to run
#[clap(long, default_value = DEFAULT_RAD_TESTS)]
testsuite: String,
Expand Down Expand Up @@ -284,15 +287,15 @@ fn assert_state(
assert_value(cpu.state.iff1 as u8, expected.iff1, "iff1")?;
assert_value(cpu.state.iff2 as u8, expected.iff2, "iff2")?;

// Load data bytes into memory
// Compare data bytes in memory
for (addr, byte) in expected.ram.iter() {
let actual = memory
.read_u8(Instant::START, *addr)
.map_err(|err| Error::Bus(format!("{:?}", err)))?;
assert_value(actual, *byte, &format!("ram at {:x}", addr))?;
}

// Load data bytes into io space
// Compare data bytes in io space
for port in ports.iter() {
if port.atype == "w" {
let actual = io
Expand All @@ -319,15 +322,14 @@ fn step_cpu_and_assert(

assert_state(cpu, memory, io, &case.final_state, args.check_extra_flags, &case.ports)?;
if args.check_timings {
// TODO re-enable. not sure why it can't divide here
//let cycles = clock_elapsed / cpu.frequency.period_duration();
//if cycles != case.cycles.len() {
// return Err(Error::Assertion(format!(
// "expected instruction to take {} cycles, but took {}",
// case.cycles.len(),
// cycles
// )));
//}
let cycles = clock_elapsed.as_duration() / cpu.frequency.period_duration();
if cycles != case.cycles.len() as u64 {
return Err(Error::Assertion(format!(
"expected instruction to take {} cycles, but took {}",
case.cycles.len(),
cycles
)));
}
}

Ok(())
Expand Down Expand Up @@ -379,6 +381,10 @@ fn test_json_file(path: PathBuf, args: &Args) -> (usize, usize, String) {
}
}

if args.no_check_io && !case.ports.is_empty() {
continue;
}

// Sort the ram memory for debugging help
if args.debug {
case.initial_state.ram.sort_by_key(|(addr, _)| *addr);
Expand Down

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