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boards: ace30: enable KCPS dynamic clock control #10368

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boards: ace30: enable KCPS dynamic clock control #10368

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6e679b0
platform: intel: ace30: update clock definitions
abonislawski Mar 16, 2026
332f127
boards: ace30: enable KCPS dynamic clock control
abonislawski Nov 17, 2025
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2 changes: 1 addition & 1 deletion app/boards/intel_adsp_ace30_ptl.conf
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Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ CONFIG_GOOGLE_RTC_AUDIO_PROCESSING_MOCK=y
CONFIG_COMP_STFT_PROCESS=y

# SOF / infrastructure
CONFIG_KCPS_DYNAMIC_CLOCK_CONTROL=n
CONFIG_KCPS_DYNAMIC_CLOCK_CONTROL=y
CONFIG_PROBE=y
CONFIG_PROBE_DMA_MAX=2
CONFIG_SOF_TELEMETRY=y
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8 changes: 3 additions & 5 deletions src/platform/ace30/include/platform/lib/clk.h
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Expand Up @@ -18,15 +18,13 @@

#define CPU_WOVCRO_FREQ_IDX 0

#define CPU_LPRO_FREQ_IDX 1

#define CPU_HPRO_FREQ_IDX 2
#define CPU_IPLL_FREQ_IDX 1

#define CPU_LOWEST_FREQ_IDX CPU_WOVCRO_FREQ_IDX

#define CPU_DEFAULT_IDX CPU_HPRO_FREQ_IDX
#define CPU_DEFAULT_IDX CPU_IPLL_FREQ_IDX

#define NUM_CPU_FREQ 3
#define NUM_CPU_FREQ 2

#define PRIMARY_CORE_BASE_CPS_USAGE 20000
#define SECONDARY_CORE_BASE_CPS_USAGE 10000
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5 changes: 2 additions & 3 deletions src/platform/ace30/lib/clk.c
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Expand Up @@ -9,9 +9,8 @@
#include <rtos/clk.h>

static const struct freq_table platform_cpu_freq[] = {
{ 38400000, 38400 },
{ 120000000, 120000 },
{ CLK_MAX_CPU_HZ, 400000 },
{ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC, CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC / 1000 },
{ CLK_MAX_CPU_HZ, CLK_MAX_CPU_HZ / 1000 },
};

STATIC_ASSERT(ARRAY_SIZE(platform_cpu_freq) == NUM_CPU_FREQ, invalid_number_of_cpu_frequencies);
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