ASoC: Intel: soc-acpi-intel-ptl-match: Add support for rt722_l0_rt132…#5501
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@macchian My main concern is that no speaker endpoint is included in the rt722's |
@bardliao , Understood. To be updated the PR. |
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| #define SOF_BT_OFFLOAD_SSP(quirk) \ | ||
| (((quirk) << SOF_BT_OFFLOAD_SSP_SHIFT) & SOF_BT_OFFLOAD_SSP_MASK) | ||
| #define SOF_SSP_BT_OFFLOAD_PRESENT BIT(18) | ||
| #define SOF_SSP_BT_OFFLOAD_PRESENT BIT(21) |
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I think this is @bardliao ok as we have not upstreamed the BT offload quirk bits yet. All shipping devices (all chromebooks) have a hardcoded SSP port for BT, so I think this is ok change to make.
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Ok update. So we have had the SOF_BT_OFFLOAD* defs in upstream for some time, and as all flags are exposed via the quirk module param, these have been available as module params as well.
So this is a bit iffy situation (created when common flags were moved to vendor neutral soc_sdw_utils.h).
There is a conflict, so we need to resolve this anyways. I think this PR is the right path. The BT_OFFLOAD bits have only been used in the DMI overrides and given this feature is not availble outside Chromebooks, there's no known usage of this by end-users (via module params). The SOC_SDW_CODEC_SPKR bit OTOH has seen a lot of use by actual users, so this we cannot change at this point.
So as a summary, I think the change in this PR is good. We do need to be very careful aligning soc_sdw_utils.h and this SOF specific file.
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The SSP BT mask bits overlapped with SOC_SDW_CODEC_SPKR, SOC_SDW_SIDECAR_AMPS, and SOC_SDW_CODEC_MIC BIT[15–17] in sdw_utils.h. Shift the SSP BT mask bits to a higher range to eliminate the conflict. Signed-off-by: Mac Chiang <mac.chiang@intel.com>
…0_l23 This patch adds support for the RT722 codec on SoundWire link 0, and RT1320 left and right amplifiers on links 2 and 3, respectively. Signed-off-by: Mac Chiang <mac.chiang@intel.com>
This SKU does not use the RT722 internal speaker. Add SOC_SDW_CODEC_SPKR to prevent DAI being created via codec_info_list.dais.quirk_exclude. Other SKUs continue to check higher-priority sdca_functions when the BIOS SDCA property is present. Signed-off-by: Mac Chiang <mac.chiang@intel.com>
This patch adds support for selecting the SSP DAI for Bluetooth offload
based on the machine parameter `bt_link_mask` when provided and on ACE4
or newer Intel SoCs. This allows platform data to override which SSP
port is used for BT offload topologies, typically named:
sof_tplg_filename"-%dch"-ssp%d-bt.tplg
Signed-off-by: Mac Chiang <mac.chiang@intel.com>
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| * and if the SoC hardware IP version is ACE4 or newer. | ||
| * This allows platform data to override which SSP is used | ||
| * for Bluetooth offload. | ||
| */ |
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sof_sdw_quirk could also from module parameter. Not sure which one should have higher priority.
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Even when the sof_sdw_quirk override is used alone or together with bt_link_mask, it is the bt_link_mask that ultimately determines which topology with the BT prefix is loaded.
| #define SOF_BT_OFFLOAD_SSP(quirk) \ | ||
| (((quirk) << SOF_BT_OFFLOAD_SSP_SHIFT) & SOF_BT_OFFLOAD_SSP_MASK) | ||
| #define SOF_SSP_BT_OFFLOAD_PRESENT BIT(18) | ||
| #define SOF_SSP_BT_OFFLOAD_PRESENT BIT(21) |
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I think this is @bardliao ok as we have not upstreamed the BT offload quirk bits yet. All shipping devices (all chromebooks) have a hardcoded SSP port for BT, so I think this is ok change to make.
The SSP BT mask bits overlapped with SOC_SDW_CODEC_SPKR, SOC_SDW_SIDECAR_AMPS, and SOC_SDW_CODEC_MIC BIT[15–17] in sdw_utils.h. Shift the SSP BT mask bits to a higher range to eliminate the conflict. Bug: 444302600 Test: run #cat /proc/asoc/cards, to check sound card is registered. Link: thesofproject/linux#5501 (The PR has been merged into the Linux GitHub, it will be picked up by kernel.org in the next timing window) Upstream-Task: 455997202 Change-Id: Ic4f9e8af8a2a9ad4f4a7f0f883402fba0afcb501 Signed-off-by: Mac Chiang <mac.chiang@intel.com>
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This patch adds support for the RT722 codec on SoundWire link 0, and RT1320 left and right amplifiers on links 2 and 3, respectively.
The RT722 speaker function is excluded, as it is the aggregate configuration.