Merge pull request #980 from sifferman/argumentless-functions-fix

Argumentless functions fix
steveicarus · Sep 4, 2023 · 64cfd68 · 64cfd68
2 parents 369c01a + 470a3da
commit 64cfd68
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Showing 6 changed files with 87 additions and 5 deletions.
diff --git a/Documentation/developer/guide/vvp/vvp.rst b/Documentation/developer/guide/vvp/vvp.rst
@@ -765,13 +765,13 @@ The .ufunc statements define a call to a user defined function.
 ::
 
 	<label> .ufunc/real <flabel>, <wid>,
-            <isymbols> ( <psymbols> ) <ssymbol>;
+            [<isymbols> ( <psymbols> )] <ssymbol>;
 
 	<label> .ufunc/vec4 <flabel>, <wid>,
-            <isymbols> ( <psymbols> ) <ssymbol>;
+            [<isymbols> ( <psymbols> )] <ssymbol>;
 
 	<label> .ufunc/e <flabel>, <wid>, <trigger>,
-            <isymbols> ( <psymbols> ) <ssymbol>;
+            [<isymbols> ( <psymbols> )] <ssymbol>;
 
 The first variant is used for functions that only need to be called
 when one of their inputs changes value. The second variant is used

diff --git a/ivtest/ivltests/sv_argumentless_func.v b/ivtest/ivltests/sv_argumentless_func.v
@@ -0,0 +1,63 @@
+
+module test;
+
+function automatic [7:0] test_func;
+    test_func = 8'h1;
+endfunction
+
+parameter test_parameter = test_func();
+
+logic [7:0] test_alwayscomb;
+always_comb test_alwayscomb = test_func();
+
+// logic [7:0] test_assign;
+// assign test_assign = test_func();
+
+// wire [7:0] test_wire = test_func();
+
+logic [7:0] test_alwaysff;
+logic clk;
+always_ff @(posedge clk) test_alwaysff <= test_func();
+
+initial begin
+    if (test_func() !== 8'h1) begin
+        $display("FAILED -- test_func()=%h, expect %h", test_func(), 8'h1);
+        $finish;
+    end
+
+    if (test_parameter !== test_func()) begin
+        $display("FAILED -- test_parameter=%h, expect %h", test_parameter, test_func());
+        $finish;
+    end
+
+    #1;
+
+    if (test_alwayscomb !== test_func()) begin
+        $display("FAILED -- test_alwayscomb=%h, expect %h", test_alwayscomb, test_func());
+        $finish;
+    end
+
+    // if (test_assign !== test_func()) begin
+    //     $display("FAILED -- test_assign=%h, expect %h", test_assign, test_func());
+    //     $finish;
+    // end
+
+    // if (test_wire !== test_func()) begin
+    //     $display("FAILED -- test_wire=%h, expect %h", test_wire, test_func());
+    //     $finish;
+    // end
+
+    clk = 0;
+    #1;
+    clk = 1;
+    #1;
+    if (test_alwaysff !== test_func()) begin
+        $display("FAILED -- test_alwaysff=%h, expect %h", test_alwaysff, test_func());
+        $finish;
+    end
+
+    $display("PASSED");
+    $finish;
+end
+
+endmodule
diff --git a/ivtest/regress-vvp.list b/ivtest/regress-vvp.list
@@ -56,6 +56,7 @@ sv_ap_uarray5			vvp_tests/sv_ap_uarray5.json
 sv_ap_uarray6			vvp_tests/sv_ap_uarray6.json
 sv_ap_uarray_fail1		vvp_tests/sv_ap_uarray_fail1.json
 sv_ap_uarray_fail2		vvp_tests/sv_ap_uarray_fail2.json
+sv_argumentless_func		vvp_tests/sv_argumentless_func.json
 sv_array_assign_fail1	vvp_tests/sv_array_assign_fail1.json
 sv_array_assign_fail2	vvp_tests/sv_array_assign_fail2.json
 sv_array_cassign6		vvp_tests/sv_array_cassign6.json

diff --git a/ivtest/vvp_tests/sv_argumentless_func.json b/ivtest/vvp_tests/sv_argumentless_func.json
@@ -0,0 +1,5 @@
+{
+    "type"          : "normal",
+    "source"        : "sv_argumentless_func.v",
+    "iverilog-args" : [ "-g2012" ]
+}
diff --git a/tgt-vvp/vvp_scope.c b/tgt-vvp/vvp_scope.c
@@ -2080,11 +2080,14 @@ static void draw_lpm_ufunc(ivl_lpm_t net)
             fprintf(vvp_out, "L_%p%s .ufunc%s TD_%s, %u", net, dly, type_string,
                     vvp_mangle_id(ivl_scope_name(def)),
                     ivl_lpm_width(net));
+	fprintf(vvp_out, ", ");
 
 	/* Print all the net signals that connect to the input of the
 	   function. */
       for (idx = 0 ;  idx < ninp ;  idx += 1) {
-	    fprintf(vvp_out, ", %s", input_strings[idx]);
+		fprintf(vvp_out, "%s", input_strings[idx]);
+		if (idx != ninp-1)
+			fprintf(vvp_out, ", ");
       }
       free(input_strings);
 
@@ -2104,7 +2107,8 @@ static void draw_lpm_ufunc(ivl_lpm_t net)
 	    fprintf(vvp_out, "v%p_0", psig);
       }
 
-      fprintf(vvp_out, ")");
+	if (ninp > 0)
+		fprintf(vvp_out, ")");
 #if 0
 	/* Now print the reference to the signal from which the
 	   result is collected. */

diff --git a/vvp/parse.y b/vvp/parse.y
@@ -261,12 +261,21 @@ statement
   | T_LABEL K_UFUNC_REAL T_SYMBOL ',' T_NUMBER ',' symbols '(' symbols ')' T_SYMBOL ';'
       { compile_ufunc_real($1, $3, $5, $7.cnt, $7.vect, $9.cnt, $9.vect, $11, 0); }
 
+  | T_LABEL K_UFUNC_REAL T_SYMBOL ',' T_NUMBER ',' T_SYMBOL ';'
+      { compile_ufunc_real($1, $3, $5, 0, 0, 0, 0, $7, 0); }
+
   | T_LABEL K_UFUNC_VEC4 T_SYMBOL ',' T_NUMBER ',' symbols '(' symbols ')' T_SYMBOL ';'
       { compile_ufunc_vec4($1, $3, $5, $7.cnt, $7.vect, $9.cnt, $9.vect, $11, 0); }
 
+  | T_LABEL K_UFUNC_VEC4 T_SYMBOL ',' T_NUMBER ',' T_SYMBOL ';'
+      { compile_ufunc_vec4($1, $3, $5, 0, 0, 0, 0, $7, 0); }
+
   | T_LABEL K_UFUNC_E T_SYMBOL ',' T_NUMBER ',' T_SYMBOL ',' symbols '(' symbols ')' T_SYMBOL ';'
       { compile_ufunc_vec4($1, $3, $5, $9.cnt, $9.vect, $11.cnt, $11.vect, $13, $7); }
 
+  | T_LABEL K_UFUNC_E T_SYMBOL ',' T_NUMBER ',' T_SYMBOL ',' T_SYMBOL ';'
+      { compile_ufunc_vec4($1, $3, $5, 0, 0, 0, 0, $7, 0); }
+
   /* Resolver statements are very much like functors. They are
      compiled to functors of a different mode. */