add option to set pcu and pmu stages

stanford-ppl · Jan 17, 2019 · 5b35e8b · 5b35e8b
1 parent 2bc3782
commit 5b35e8b
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Showing 2 changed files with 4 additions and 2 deletions.
diff --git a/src/core/SpadeConfig.scala b/src/core/SpadeConfig.scala
@@ -43,5 +43,7 @@ object SpadeConfig extends prism.GlobalConfig {
   register[Int]("vc", default=4, info="Number of virtual classes per network")
   register[String]("link-prop", default="db", info="[db-double buffered, cd-credit based]")
   register[Int]("flit-width", default=512, info="Flit width for dynamic network")
+  register[Int]("pcu-stage", default=6, info="Number of stages in PCU")
+  register[Int]("pmu-stage", default=4, info="Number of stages in PMU")
 
 }
diff --git a/src/param/routable/CUParams.scala b/src/param/routable/CUParams.scala
@@ -31,7 +31,7 @@ case class PCUParam (
   vectorFifoParam:FIFOParam=FIFOParam(size=option("fifo-depth")),
   numCtrs:Int=6,
   simdParam:Option[SIMDParam]=Some(DefaultSIMDParam(
-    numStages=6, 
+    numStages=option[Int]("pcu-stage"), 
     ops=allOps, 
     vectorized=true, 
     numRegs=16, 
@@ -72,7 +72,7 @@ case class PMUParam (
   sramParam:SRAMParam=SRAMParam(size=option("pmu-sram-size"),4), // 256 kB
   numCtrs:Int=6,
   simdParam:Option[SIMDParam]=Some(DefaultSIMDParam(
-    numStages=4, 
+    numStages=option[Int]("pmu-stage"), 
     ops=fixOps ++ bitOps ++ otherOps, 
     vectorized=true, 
     numRegs=16,