Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

jit: make sure RSP is 16 byte aligned when we call into rust code #515

Merged
merged 1 commit into from
Sep 19, 2023
Merged

jit: make sure RSP is 16 byte aligned when we call into rust code #515

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
21 changes: 17 additions & 4 deletions src/jit.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -852,13 +852,23 @@ impl<'a, V: Verifier, C: ContextObject> JitCompiler<'a, V, C> {
for reg in saved_registers.iter() {
self.emit_ins(X86Instruction::push(*reg, None));
}


// Align RSP to 16 bytes
self.emit_ins(X86Instruction::push(RSP, None));
self.emit_ins(X86Instruction::push(RSP, Some(X86IndirectAccess::OffsetIndexShift(0, RSP, 0))));
self.emit_ins(X86Instruction::alu(OperandSize::S64, 0x81, 4, RSP, -16, None));

let stack_arguments = arguments.len().saturating_sub(ARGUMENT_REGISTERS.len()) as i64;
if stack_arguments % 2 != 0 {
// If we're going to pass an odd number of stack args we need to pad
// to preserve alignment
self.emit_ins(X86Instruction::alu(OperandSize::S64, 0x81, 5, RSP, 8, None));
}

// Pass arguments
let mut stack_arguments = 0;
for argument in arguments {
let is_stack_argument = argument.index >= ARGUMENT_REGISTERS.len();
let dst = if is_stack_argument {
stack_arguments += 1;
R11
} else {
ARGUMENT_REGISTERS[argument.index]
Expand Down Expand Up @@ -926,7 +936,10 @@ impl<'a, V: Verifier, C: ContextObject> JitCompiler<'a, V, C> {
}

// Restore registers from stack
self.emit_ins(X86Instruction::alu(OperandSize::S64, 0x81, 0, RSP, stack_arguments * 8, None));
self.emit_ins(X86Instruction::alu(OperandSize::S64, 0x81, 0, RSP,
if stack_arguments % 2 != 0 { stack_arguments + 1 } else { stack_arguments } * 8, None));
self.emit_ins(X86Instruction::load(OperandSize::S64, RSP, RSP, X86IndirectAccess::OffsetIndexShift(8, RSP, 0)));

for reg in saved_registers.iter().rev() {
self.emit_ins(X86Instruction::pop(*reg));
}
Expand Down