Add cv181x reset support to SBI

build/Kconfig

@@ -18,6 +18,16 @@ config ARCH
 	help
 	  Arch define.
 
+menu "assshat"
+
+config CUSTOM_KERNEL
+	string "Custom kernel bin to load from OpenSBI"
+	default ""
+	help
+	  yes
+
+endmenu
+
 menu "Compile-time checks and compiler options"
 
 config CROSS_COMPILE

build/boards/sg200x/sg2002_licheervnano_sd/partition/partition_sd.xml

@@ -1,4 +1,4 @@
 <physical_partition type="sd">
     <partition label="BOOT" size_in_kb="80960" readonly="false" file="boot.sd"/>
-    <partition label="ROOTFS" size_in_kb="1572864" readonly="false" file="rootfs.sd" />
+    <partition label="ROOTFS" size_in_kb="1576960" readonly="false" file="rootfs.sd" />
 </physical_partition>

build/boards/sg200x/sg2002_licheervnano_sd/sg2002_licheervnano_sd_defconfig

@@ -25,5 +25,7 @@ CONFIG_KERNEL_UNCOMPRESSED=y
 CONFIG_SENSOR_TUNING_PARAM_cv181x_src_gcore_gc4653=y
 # CONFIG_SENSOR_TUNING_PARAM_sg200x_src_ov_os04a10=y
 # CONFIG_ROOTFS_OVERLAYFS is not set
-# CONFIG_ENABLE_FREERTOS=y
+# CONFIG_ENABLE_FREERTOS is not set
 # CONFIG_TARGET_PACKAGE_GATORD is not set
+CONFIG_CUSTOM_KERNEL="tests/kernel.bin"
+# CONFIG_BUILDROOT_FS is not set

build/panels/panel_list.json

@@ -16,7 +16,8 @@
 			"st7701",
 			"st7701_hd228001c31",
 			"st7701_hd228001c31_alt0",
-			"st7785m"
+			"st7785m",
+			"tt049amn10a"
 		],
 		"lvds" : [
 			"ek79202"

build/scripts/fip_v2.mk

@@ -1,9 +1,17 @@
 opensbi: export CROSS_COMPILE=$(CONFIG_CROSS_COMPILE_SDK)
+ifneq ($(CONFIG_CUSTOM_KERNEL),"")
+opensbi:
+	$(call print_target)
+	${Q}$(MAKE) -j${NPROC} -C ${OPENSBI_PATH} PLATFORM=generic PLATFORM_DEFCONFIG=platform/generic/configs/defconfig \
+	    FW_PAYLOAD_PATH=${TOP_DIR}/$(CONFIG_CUSTOM_KERNEL) FW_TEXT_START=0x80000000 \
+	    FW_FDT_PATH=${UBOOT_PATH}/${UBOOT_OUTPUT_FOLDER}/arch/riscv/dts/${CHIP}_${BOARD}.dtb
+else
 opensbi: u-boot-build
 	$(call print_target)
-	${Q}$(MAKE) -j${NPROC} -C ${OPENSBI_PATH} PLATFORM=generic \
-	    FW_PAYLOAD_PATH=${UBOOT_PATH}/${UBOOT_OUTPUT_FOLDER}/u-boot-raw.bin \
+	${Q}$(MAKE) -j${NPROC} -C ${OPENSBI_PATH} PLATFORM=generic PLATFORM_DEFCONFIG=platform/generic/configs/defconfig \
+	    FW_PAYLOAD_PATH=${UBOOT_PATH}/${UBOOT_OUTPUT_FOLDER}/u-boot-raw.bin FW_TEXT_START=0x80000000 \
 	    FW_FDT_PATH=${UBOOT_PATH}/${UBOOT_OUTPUT_FOLDER}/arch/riscv/dts/${CHIP}_${BOARD}.dtb
+endif
 
 opensbi-clean:
 	$(call print_target)
@@ -26,6 +34,17 @@ fsbl%: export ARCH=$(call qstrip,${CONFIG_ARCH})
 fsbl%: export OD_CLK_SEL=${CONFIG_OD_CLK_SEL}
 fsbl%: export VC_CLK_OVERDRIVE=${CONFIG_VC_CLK_OVERDRIVE}
 fsbl%: export TPU_PERF_MODE=$(shell if [ "${CONFIG_CHIP_cv1812cp}" = "y" ] || [ "${CONFIG_CHIP_sg2002}" = "y" ]; then echo "y";else echo "n";fi)
+ifneq ($(CONFIG_CUSTOM_KERNEL),"")
+# build uboot for dtb
+fsbl-build: u-boot-build memory-map
+	$(call print_target)
+	${Q}mkdir -p ${FSBL_PATH}/build
+	${Q}ln -snrf -t ${FSBL_PATH}/build ${CVI_BOARD_MEMMAP_H_PATH}
+	${Q}$(MAKE) -j${NPROC} -C ${FSBL_PATH} O=${FSBL_OUTPUT_PATH} BLCP_2ND_PATH=${BLCP_2ND_PATH} \
+		LOADER_2ND_PATH=${TOP_DIR}/$(CONFIG_CUSTOM_KERNEL)
+	${Q}cp ${FSBL_OUTPUT_PATH}/fip.bin ${OUTPUT_DIR}/
+	${Q}cp ${FSBL_OUTPUT_PATH}/fip.bin ${OUTPUT_DIR}/fip_spl.bin
+else
 fsbl-build: u-boot-build memory-map
 	$(call print_target)
 	${Q}mkdir -p ${FSBL_PATH}/build
@@ -41,6 +60,7 @@ ifeq (${CONFIG_UBOOT_SPL_CUSTOM},y)
 else
 	${Q}cp ${FSBL_OUTPUT_PATH}/fip.bin ${OUTPUT_DIR}/fip_spl.bin
 endif
+endif
 
 fsbl-clean: rtos-clean
 	$(call print_target)

buildroot/configs/cvitek_SG200X_musl_riscv64_defconfig

@@ -29,7 +29,7 @@ BR2_PACKAGE_HOST_GDB_SIM=y
 BR2_PACKAGE_HOST_GDB_TUI=y
 BR2_GDB_VERSION_13=y
 
-BR2_CCACHE=y
+# BR2_CCACHE is not set
 BR2_REPRODUCIBLE=y
 BR2_PER_PACKAGE_DIRECTORIES=y
 
@@ -608,4 +608,4 @@ BR2_PACKAGE_BUSYBOX_CONFIG_FRAGMENT_FILES="$(TOPDIR)/board/cvitek/SG200X/busybox
 
 BR2_TARGET_TZ_INFO=y
 BR2_TARGET_TZ_ZONELIST="default"
-BR2_TARGET_LOCALTIME="Etc/UTC"
+BR2_TARGET_LOCALTIME="Etc/UTC"

fsbl/Makefile

@@ -37,8 +37,8 @@ endif
 MAKE_HELPERS_DIRECTORY := make_helpers/
 
 V ?= 1
-DEBUG := 0
-LOG_LEVEL := 2
+DEBUG := 1
+LOG_LEVEL := 10
 ENABLE_ASSERTIONS := 1
 PRINTF_TIMESTAMP := 0
 

fsbl/plat/cv181x/bl2/bl2_opt.c

@@ -256,9 +256,12 @@ int load_monitor(int retry, uint64_t *monitor_entry)
 		panic_handler();
 	}
 
+	NOTICE("loading monitor image\n");
+
 	ret = p_rom_api_load_image((void *)(uintptr_t)fip_param2.monitor_runaddr, fip_param2.monitor_loadaddr,
 				   fip_param2.monitor_size, retry);
 	if (ret < 0) {
+		NOTICE("error loading monitor image\n");
 		return ret;
 	}
 
@@ -332,15 +335,15 @@ int load_loader_2nd(int retry, uint64_t *loader_2nd_entry)
 
 	crc = p_rom_api_image_crc(image_buf + cksum_offset, loader_2nd_header->size - cksum_offset);
 	if (crc != loader_2nd_header->cksum) {
-		ERROR("loader_2nd_cksum (0x%x/0x%x)\n", crc, loader_2nd_header->cksum);
-		return -1;
+		WARN("loader_2nd_cksum (0x%x/0x%x)\n", crc, loader_2nd_header->cksum);
+		//return -1;
 	}
 
 	ret = dec_verify_image(image_buf + cksum_offset, loader_2nd_header->size - cksum_offset,
 			       sizeof(struct loader_2nd_header) - cksum_offset, fip_param1);
 	if (ret < 0) {
-		ERROR("verify loader 2nd (%d)\n", ret);
-		return ret;
+		WARN("verify loader 2nd (%d)\n", ret);
+		//return ret;
 	}
 
 	time_records->load_loader_2nd_end = read_time_ms();
@@ -384,17 +387,28 @@ int load_rest(enum CHIP_CLK_MODE mode)
 
 	// Init sys PLL and switch clocks to PLL
 	sys_pll_init(mode);
+	NOTICE("load_rest\n");
 
 retry_from_flash:
 	for (retry = 0; retry < p_rom_api_get_number_of_retries(); retry++) {
-		if (load_blcp_2nd(retry) < 0)
+		if (load_blcp_2nd(retry) < 0) {
+			NOTICE("error loading blcp_2nd\n");
 			continue;
+		}
 
-		if (load_monitor(retry, &monitor_entry) < 0)
+		if (load_monitor(retry, &monitor_entry) < 0) {
+			NOTICE("error loading monitor\n");
 			continue;
+		}
 
-		if (load_loader_2nd(retry, &loader_2nd_entry) < 0)
+		NOTICE("monitor loaded\n");
+
+		if (load_loader_2nd(retry, &loader_2nd_entry) < 0) {
+			NOTICE("error loading loader_2nd\n");
 			continue;
+		}
+
+		NOTICE("2nd loaded\n");
 
 		break;
 	}
@@ -414,6 +428,8 @@ int load_rest(enum CHIP_CLK_MODE mode)
 		}
 	}
 
+	NOTICE("bs\n");
+
 	sync_cache();
 	console_flush();
 

fsbl/plat/cv181x/fiptool.py

@@ -484,8 +484,8 @@ def add_loader_2nd(self, args):
 
         e = self.ldr_2nd_hdr["MAGIC"]
         magic = loader_2nd[e.addr : e.end]
-        if magic != LOADER_2ND_MAGIC_ORIG:
-            raise ValueError("loader_2nd's magic should be %r, but %r" % (LOADER_2ND_MAGIC_ORIG, magic))
+        #if magic != LOADER_2ND_MAGIC_ORIG:
+            #raise ValueError("loader_2nd's magic should be %r, but %r" % (LOADER_2ND_MAGIC_ORIG, magic))
 
         self.compress_algo = args.compress
         self.body2["LOADER_2ND"].content = loader_2nd
@@ -588,7 +588,8 @@ def _compress_ldr_2nd(self):
         elif magic in LOADER_2ND_MAGIC_LIST:
             logging.info("loader_2nd is already compressed")
         else:
-            raise ValueError("unknown loader_2nd magic (%r)", magic)
+            #raise ValueError("unknown loader_2nd magic (%r)", magic)
+            logging.info("loader_2nd unknown, will not compress")
 
         self.body2["LOADER_2ND"].content = self.pad(hdr + body, IMAGE_ALIGN)
 

opensbi/lib/utils/reset/fdt_reset.c

@@ -11,6 +11,8 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/reset/fdt_reset.h>
 
+#include <sbi/sbi_console.h>
+
 extern struct fdt_reset fdt_reset_sifive;
 extern struct fdt_reset fdt_reset_htif;
 extern struct fdt_reset fdt_reset_thead;
@@ -30,7 +32,10 @@ int fdt_reset_init(void)
 	const struct fdt_match *match;
 	void *fdt = sbi_scratch_thishart_arg1_ptr();
 
+	sbi_puts("fdt_reset_init\n");
+
 	for (pos = 0; pos < array_size(reset_drivers); pos++) {
+		sbi_printf("pos: %d\n", pos);
 		drv = reset_drivers[pos];
 
 		noff = fdt_find_match(fdt, -1, drv->match_table, &match);

opensbi/platform/generic/platform.c

@@ -22,6 +22,10 @@
 #include <sbi_utils/ipi/fdt_ipi.h>
 #include <sbi_utils/reset/fdt_reset.h>
 
+#include <sbi/sbi_system.h>
+
+#include <sbi/riscv_io.h>
+
 extern const struct platform_override sifive_fu540;
 
 static const struct platform_override *special_platforms[] = {
@@ -31,6 +35,43 @@ static const struct platform_override *special_platforms[] = {
 static const struct platform_override *generic_plat = NULL;
 static const struct fdt_match *generic_plat_match = NULL;
 
+
+static int cv_system_reset_check(u32 type, u32 reason)
+{
+	return 1;
+}
+
+#define REG_RTC_BASE		0x05026000
+  #define RTC_EN_WARM_RST_REQ	0xCC
+
+#define REG_RTC_CTRL_BASE	0x05025000
+  #define RTC_CTRL0_UNLOCKKEY	0x4
+  #define RTC_CTRL0				0x8
+
+static void cv_system_reset(u32 type, u32 reason)
+{
+	u32 val;
+
+	writel(0x01, (volatile void *)(REG_RTC_BASE + RTC_EN_WARM_RST_REQ));
+	while (readl((volatile void *)(REG_RTC_BASE + RTC_EN_WARM_RST_REQ)) != 0x01)
+		;
+	writel(0xAB18, (volatile void *)(REG_RTC_CTRL_BASE + RTC_CTRL0_UNLOCKKEY));
+	val = readl((volatile void *)(REG_RTC_CTRL_BASE + RTC_CTRL0));
+	val |= (0xFFFF0800 | (0x1 << 4));
+	writel(val, (volatile void *)(REG_RTC_CTRL_BASE + RTC_CTRL0));
+
+	while (1)
+		;
+}
+
+static struct sbi_system_reset_device cv_reset = {
+	.name = "cv_reset",
+	.system_reset_check = cv_system_reset_check,
+	.system_reset = cv_system_reset
+};
+
+
+
 static void fw_platform_lookup_special(void *fdt, int root_offset)
 {
 	int pos, noff;
@@ -125,10 +166,14 @@ static int generic_early_init(bool cold_boot)
 			return rc;
 	}
 
+	if (cold_boot)
+		sbi_system_reset_set_device(&cv_reset);
+
 	if (!cold_boot)
 		return 0;
 
-	return fdt_reset_init();
+	//return fdt_reset_init();
+	return 0;
 }
 
 static int generic_final_init(bool cold_boot)

tests/.gitignore

@@ -0,0 +1,3 @@
+*.bin
+*.elf
+*.o

tests/Makefile

@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: MIT
+# Copyright (c) Thomas Makin 2025
+
+# default for standalone comp
+CROSS_COMPILE ?= riscv64-unknown-elf-
+AS ?= as
+LD ?= ld
+OBJCOPY ?= objcopy
+
+# cvitek build system sets this for unknown elf triplet
+ifneq ($(CROSS_COMPILE_GLIBC_RISCV64),)
+CROSS_COMPILE := $(CROSS_COMPILE_GLIBC_RISCV64)
+endif
+
+kernel.bin: kernel.S
+	$(CROSS_COMPILE)$(AS) -o kernel.o kernel.S
+	$(CROSS_COMPILE)$(LD) -T test.ld -o kernel.elf kernel.o
+	$(CROSS_COMPILE)$(OBJCOPY) -O binary kernel.elf $@
+
+clean:
+	@rm -f kernel.o
+	@rm -f kernel.elf
+	@rm -f kernel.bin
+	@echo "Test kernel artifacts removed"

tests/kernel.S

@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: MIT
+# Copyright (c) Thomas Makin 2025
+
+.section .header, "a"
+.align 4
+.global _start
+_start:
+    .word main               # jump0
+    .word 0x000BAC07         # Magic number (4 bytes)
+    .word 0x00000000         # cksum (4 bytes), replaced at build time
+    .word 0x00000200         # size (4 bytes), replaced at build time
+    .dword 0x80200000        # runaddr (8 bytes)
+    .word 0x00000000         # rsvd1 (4 bytes)
+    .word 0x00000000         # rsvd2 (4 bytes)
+
+.section .text.kernel
+main:
+        lla s0, tjm
+        #call _print
+        #call _reset
+        ret
+
+.section .rodata
+text:
+        .incbin "text.txt"
+        .byte 0
+debug:
+        .string "debug"

tests/test.ld

@@ -0,0 +1,31 @@
+MEMORY {
+  kernel_space (rwx) : ORIGIN = 0x80200000, LENGTH = 128K
+}
+
+SECTIONS {
+    . = ORIGIN(kernel_space);
+
+    .header ALIGN(4) : {
+        KEEP(*(.header))
+    } > kernel_space
+
+    .text.kernel ALIGN(4) : {
+        *(.text.kernel)
+    } > kernel_space
+
+    .rodata ALIGN(4) : {
+        *(.rodata)
+    } > kernel_space
+
+    .data ALIGN(4) : {
+        *(.data)
+    } > kernel_space
+
+    .bss ALIGN(4) : {
+        *(COMMON)
+        *(.bss)
+    } > kernel_space
+
+    _end = .;
+    _. = ASSERT((_end <= (ORIGIN(kernel_space) + LENGTH(kernel_space))), "Binary exceeds available memory");
+}

tests/tjm.txt

@@ -0,0 +1,6 @@
+    _______   _ __  __
+   |__   __| | |  \/  |
+      | |    | | \  / |
+      | |_   | | |\/| |
+      | | |__| | |  | |
+      |_|\____/|_|  |_|