We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
Modular hardware build system
Python 988 99
SiliconCompiler Design Gallery
Verilog 39 4
Hardware abstraction library
Verilog 27 5
Library of open source Process Design Kits (PDKs)
SourcePawn 40 7
Demo SoC for SiliconCompiler.
SystemVerilog 59 9
A configurable RTL to bitstream FPGA toolchain
Python 33 3
Yosys Open SYnthesis Suite
Library of FPGA architectures
