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Enable all arch to be cross-tested with gcc
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blapie committed Nov 1, 2024
1 parent 0d8576e commit 605f295
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18 changes: 9 additions & 9 deletions .github/workflows/build_and_test.yml
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Expand Up @@ -305,15 +305,15 @@ jobs:
- arch: s390x
compiler: llvm
# RISC-V
# - arch: riscv64
# compiler: gcc
# qemu_cpu: "rv64,zba=true,zbb=true,zbs=true,v=false"
# - arch: riscv64
# compiler: gcc
# qemu_cpu: "rv64,zba=true,zbb=true,zbs=true,v=true,vlen=128,elen=64,vext_spec=v1.0"
# - arch: riscv64
# compiler: gcc
# qemu_cpu: "rv64,zba=true,zbb=true,zbs=true,v=true,vlen=256,elen=64,vext_spec=v1.0"
- arch: riscv64
compiler: gcc
qemu_cpu: "rv64,zba=true,zbb=true,zbs=true,v=false"
- arch: riscv64
compiler: gcc
qemu_cpu: "rv64,zba=true,zbb=true,zbs=true,v=true,vlen=128,elen=64,vext_spec=v1.0"
- arch: riscv64
compiler: gcc
qemu_cpu: "rv64,zba=true,zbb=true,zbs=true,v=true,vlen=256,elen=64,vext_spec=v1.0"
- arch: riscv64
compiler: llvm
qemu_cpu: "rv64,zba=true,zbb=true,zbs=true,v=false"
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2 changes: 1 addition & 1 deletion README.md
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Expand Up @@ -89,7 +89,7 @@ Compilation of SLEEF on previously supported environments might still be safe, w
<td colspan="4">N/A</td>
</tr>
<tr align="center"><th>RISC-V<br>(riscv64)</th><th>RVV1, RVV2</th>
<td>N/A (14+)</td><td>:green_circle:</td><td>N/A</td>
<td>:green_circle:</td><td>:green_circle:</td><td>N/A</td>
<td colspan="2">N/A</td>
<td colspan="4">N/A</td>
</tr>
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