Add riscv32imafc target specs

Signed-off-by: Nick Spinale <[email protected]>

crates/sel4-generate-target-specs/src/main.rs

@@ -178,7 +178,7 @@ impl Arch {
         v.push(Self::Riscv64(RiscVArch::IMAC));
         v.push(Self::Riscv64(RiscVArch::GC));
         v.push(Self::Riscv32(RiscVArch::IMAC));
-        // v.push(Self::Riscv32(RiscVArch::IMAFC)); # TODO add after bumping Rust toolchain
+        v.push(Self::Riscv32(RiscVArch::IMAFC));
         v.push(Self::X86_64);
         v
     }

support/targets/riscv32imafc-sel4-minimal.json

@@ -0,0 +1,19 @@
+{
+  "arch": "riscv32",
+  "cpu": "generic-rv32",
+  "crt-objects-fallback": "false",
+  "data-layout": "e-m:e-p:32:32-i64:64-n32-S128",
+  "eh-frame-header": false,
+  "emit-debug-gdb-scripts": false,
+  "env": "sel4",
+  "exe-suffix": ".elf",
+  "features": "+m,+a,+c,+f",
+  "linker": "rust-lld",
+  "linker-flavor": "gnu-lld",
+  "llvm-abiname": "ilp32f",
+  "llvm-target": "riscv32",
+  "max-atomic-width": 32,
+  "panic-strategy": "abort",
+  "relocation-model": "static",
+  "target-pointer-width": "32"
+}

support/targets/riscv32imafc-sel4.json

@@ -0,0 +1,18 @@
+{
+  "arch": "riscv32",
+  "cpu": "generic-rv32",
+  "crt-objects-fallback": "false",
+  "data-layout": "e-m:e-p:32:32-i64:64-n32-S128",
+  "emit-debug-gdb-scripts": false,
+  "env": "sel4",
+  "exe-suffix": ".elf",
+  "features": "+m,+a,+c,+f",
+  "has-thread-local": true,
+  "linker": "rust-lld",
+  "linker-flavor": "gnu-lld",
+  "llvm-abiname": "ilp32f",
+  "llvm-target": "riscv32",
+  "max-atomic-width": 32,
+  "relocation-model": "static",
+  "target-pointer-width": "32"
+}