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Support input/output in vector registers of s390x inline assembly #131664
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☔ The latest upstream changes (presumably #131672) made this pull request unmergeable. Please resolve the merge conflicts. |
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☔ The latest upstream changes (presumably #132152) made this pull request unmergeable. Please resolve the merge conflicts. |
☔ The latest upstream changes (presumably #133006) made this pull request unmergeable. Please resolve the merge conflicts. |
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Some changes occurred in compiler/rustc_codegen_gcc |
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Is there a way to feature-gate this functionality? Since s390x asm support is stable, every change here needs to go through an FCP since it will instantly be stable. |
This extends currently clobber-only vector registers (
vreg
) support to allow passing#[repr(simd)]
types, floats (f32/f64/f128), and integers (i32/i64/i128) as input/output.vreg
vector
i32
,f32
,i64
,f64
,i128
,f128
,i8x16
,i16x8
,i32x4
,i64x2
,f32x4
,f64x2
This matches the list of types that are supported by the vector registers in LLVM:
https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td#L301-L313
In addition to
core::simd
types and floats listed above, custom#[repr(simd)]
types of the same size and type are also allowed. All allowed types other than i32/f32/i64/f64/i128, and relevant target features are currently unstable.Currently there is no SIMD type for s390x in
core::arch
, but this is tracked in #130869.cc #130869 about vector facility support in s390x
cc #125398 & #116909 about f128 support in asm
@rustbot label +O-SystemZ +A-inline-assembly