update to [email protected]

rust-iot · Oct 25, 2023 · 0ac3a22 · 0ac3a22
1 parent 183dcbb
commit 0ac3a22
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Showing 13 changed files with 273 additions and 263 deletions.
diff --git a/Cargo.toml b/Cargo.toml
@@ -12,20 +12,20 @@ pkg-url = "{ repo }/releases/download/v{ version }/sx127x-util-{ target }.tgz"
 bin-dir = "{ bin }-{ target }{ format }"
 
 [features]
-util = [ "structopt", "driver-pal", "driver-pal/hal", "simplelog", "humantime" ] 
+util = [ "clap", "driver-pal", "driver-pal/hal", "simplelog", "humantime" ] 
 default = [ "util", "serde", "driver-pal/hal-cp2130", "driver-pal/hal-linux" ]
 
 [dependencies]
 radio = "0.11.0"
-embedded-hal = "1.0.0-alpha.7"
+embedded-hal = "1.0.0-rc.1"
 libc = "0.2"
 log = { version = "0.4" }
 bitflags = "1.0"
 
 driver-pal = { version = "0.8.0-alpha.6", default_features = false, optional=true }
 
 serde = { version = "1.0", default-features = false, features = ["derive"], optional = true }
-structopt = { version = "0.3.21", optional = true }
+clap = { version = "4.4.7", optional = true, features = [ "derive" ] }
 simplelog = { version = "0.8.0", optional = true }
 humantime = { version = "2.0.0", optional = true }
 

diff --git a/src/base.rs b/src/base.rs
@@ -5,9 +5,9 @@
 
 use core::fmt::Debug;
 
-use embedded_hal::delay::blocking::{DelayUs};
-use embedded_hal::digital::blocking::{OutputPin, InputPin};
-use embedded_hal::spi::blocking::{Transactional, TransferInplace, Write};
+use embedded_hal::delay::DelayUs;
+use embedded_hal::digital::{InputPin, OutputPin};
+use embedded_hal::spi::{ErrorType, SpiDevice};
 
 /// HAL trait for radio interaction, may be generic over SPI or UART connections
 pub trait Hal {
@@ -20,50 +20,45 @@ pub trait Hal {
     fn wait_busy(&mut self) -> Result<(), Self::Error>;
 
     /// Delay for the specified time
-    fn delay_ms(&mut self, ms: u32) -> Result<(), Self::Error>;
+    fn delay_ms(&mut self, ms: u32);
 
     /// Delay for the specified time
-    fn delay_us(&mut self, us: u32) -> Result<(), Self::Error>;
+    fn delay_us(&mut self, us: u32);
 
     /// Read from radio with prefix
     fn prefix_read(&mut self, prefix: &[u8], data: &mut [u8]) -> Result<(), Self::Error>;
 
     /// Write to radio with prefix
     fn prefix_write(&mut self, prefix: &[u8], data: &[u8]) -> Result<(), Self::Error>;
 
-   /// Read from the specified register
-   fn read_regs<'a>(
-    &mut self,
-    reg: u8,
-    data: &mut [u8],
-    ) -> Result<(), Self::Error> {
+    /// Read from the specified register
+    fn read_regs<'a>(&mut self, reg: u8, data: &mut [u8]) -> Result<(), Self::Error> {
         // Setup register read
-        let out_buf: [u8; 1] = [reg as u8 & 0x7F];
+        let out_buf: [u8; 1] = [reg & 0x7F];
         self.wait_busy()?;
         let r = self
             .prefix_read(&out_buf, data)
-            .map(|_| ())
-            .map_err(|e| e.into());
+            .map(|_| ());
         self.wait_busy()?;
         r
     }
 
     /// Write to the specified register
     fn write_regs(&mut self, reg: u8, data: &[u8]) -> Result<(), Self::Error> {
         // Setup register write
-        let out_buf: [u8; 1] = [reg as u8 | 0x80];
+        let out_buf: [u8; 1] = [reg | 0x80];
         self.wait_busy()?;
-        let r = self.prefix_write(&out_buf, data).map_err(|e| e.into());
+        let r = self.prefix_write(&out_buf, data);
         self.wait_busy()?;
         r
     }
 
     /// Write to the specified buffer
     fn write_buff(&mut self, data: &[u8]) -> Result<(), Self::Error> {
         // Setup fifo buffer write
-        let out_buf: [u8; 1] = [0x00 | 0x80];
+        let out_buf: [u8; 1] = [0x80];
         self.wait_busy()?;
-        let r = self.prefix_write(&out_buf, data).map_err(|e| e.into());
+        let r = self.prefix_write(&out_buf, data);
         self.wait_busy()?;
         r
     }
@@ -75,32 +70,26 @@ pub trait Hal {
         self.wait_busy()?;
         let r = self
             .prefix_read(&out_buf, data)
-            .map(|_| ())
-            .map_err(|e| e.into());
+            .map(|_| ());
         self.wait_busy()?;
         r
     }
 
     /// Read a single u8 value from the specified register
     fn read_reg(&mut self, reg: u8) -> Result<u8, Self::Error> {
         let mut incoming = [0u8; 1];
-        self.read_regs(reg.into(), &mut incoming)?;
+        self.read_regs(reg, &mut incoming)?;
         Ok(incoming[0])
     }
 
     /// Write a single u8 value to the specified register
     fn write_reg(&mut self, reg: u8, value: u8) -> Result<(), Self::Error> {
-        self.write_regs(reg.into(), &[value])?;
+        self.write_regs(reg, &[value])?;
         Ok(())
     }
 
     /// Update the specified register with the provided value & mask
-    fn update_reg(
-        &mut self,
-        reg: u8,
-        mask: u8,
-        value: u8,
-    ) -> Result<u8, Self::Error> {
+    fn update_reg(&mut self, reg: u8, mask: u8, value: u8) -> Result<u8, Self::Error> {
         let existing = self.read_reg(reg)?;
         let updated = (existing & !mask) | (value & mask);
         self.write_reg(reg, updated)?;
@@ -109,24 +98,21 @@ pub trait Hal {
 }
 
 #[derive(Debug, Clone, PartialEq)]
-#[cfg_attr(feature="defmt", derive(defmt::Format))]
-pub enum HalError<Spi, Pin, Delay> {
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
+pub enum HalError<Spi, Pin> {
     Spi(Spi),
     Pin(Pin),
-    Delay(Delay),
-}
-
-/// Helper SPI trait to tie errors together (no longer required next HAL release)
-pub trait SpiBase: TransferInplace<u8, Error = <Self as SpiBase>::Error> + Write<u8, Error = <Self as SpiBase>::Error> + Transactional<u8, Error = <Self as SpiBase>::Error> {
-    type Error;
-}
-
-impl <T: TransferInplace<u8, Error = E> + Write<u8, Error = E> + Transactional<u8, Error = E>, E> SpiBase for T {
-    type Error = E;
 }
 
 /// Spi base object defined interface for interacting with radio via SPI
-pub struct Base <Spi: SpiBase, Cs: OutputPin, Busy: InputPin, Ready: InputPin, Sdn: OutputPin, Delay: DelayUs> {
+pub struct Base<
+    Spi: SpiDevice<u8>,
+    Cs: OutputPin,
+    Busy: InputPin,
+    Ready: InputPin,
+    Sdn: OutputPin,
+    Delay: DelayUs,
+> {
     pub spi: Spi,
     pub cs: Cs,
     pub busy: Busy,
@@ -138,29 +124,28 @@ pub struct Base <Spi: SpiBase, Cs: OutputPin, Busy: InputPin, Ready: InputPin, S
 /// Implement HAL for base object
 impl<Spi, Cs, Busy, Ready, Sdn, PinError, Delay> Hal for Base<Spi, Cs, Busy, Ready, Sdn, Delay>
 where
-    Spi: SpiBase,
-    <Spi as SpiBase>::Error: Debug + 'static,
-    
-    Cs: OutputPin<Error=PinError>,
-    Busy: InputPin<Error=PinError>,
-    Ready: InputPin<Error=PinError>,
-    Sdn: OutputPin<Error=PinError>,
+    Spi: SpiDevice<u8>,
+    <Spi as ErrorType>::Error: Debug + 'static,
+
+    Cs: OutputPin<Error = PinError>,
+    Busy: InputPin<Error = PinError>,
+    Ready: InputPin<Error = PinError>,
+    Sdn: OutputPin<Error = PinError>,
     PinError: Debug + 'static,
 
     Delay: DelayUs,
-    <Delay as DelayUs>::Error: Debug + 'static,
 {
-    type Error = HalError<<Spi as SpiBase>::Error, PinError, <Delay as DelayUs>::Error>;
+    type Error = HalError<<Spi as ErrorType>::Error, PinError>;
 
     /// Reset the radio
     fn reset(&mut self) -> Result<(), Self::Error> {
         self.sdn.set_low().map_err(HalError::Pin)?;
 
-        self.delay.delay_ms(1).map_err(HalError::Delay)?;
+        self.delay.delay_ms(1);
 
         self.sdn.set_high().map_err(HalError::Pin)?;
 
-        self.delay.delay_ms(10).map_err(HalError::Delay)?;
+        self.delay.delay_ms(10);
 
         Ok(())
     }
@@ -172,15 +157,13 @@ where
     }
 
     /// Delay for the specified time
-    fn delay_ms(&mut self, ms: u32) -> Result<(), Self::Error> {
-        self.delay.delay_ms(ms).map_err(HalError::Delay)?;
-        Ok(())
+    fn delay_ms(&mut self, ms: u32) {
+        self.delay.delay_ms(ms);
     }
 
     /// Delay for the specified time
-    fn delay_us(&mut self, us: u32) -> Result<(), Self::Error> {
-        self.delay.delay_us(us).map_err(HalError::Delay)?;
-        Ok(())
+    fn delay_us(&mut self, us: u32) {
+        self.delay.delay_us(us);
     }
 
     /// Write data with prefix, asserting CS as required
@@ -201,7 +184,10 @@ where
     fn prefix_read(&mut self, prefix: &[u8], data: &mut [u8]) -> Result<(), Self::Error> {
         self.cs.set_low().map_err(HalError::Pin)?;
 
-        let r = self.spi.write(prefix).map(|_| self.spi.transfer_inplace(data));
+        let r = self
+            .spi
+            .write(prefix)
+            .map(|_| self.spi.transfer_in_place(data));
 
         self.cs.set_high().map_err(HalError::Pin)?;
 

diff --git a/src/device/common.rs b/src/device/common.rs
@@ -1,6 +1,6 @@
 /// Payload length configuration
 #[derive(Copy, Clone, PartialEq, Debug)]
-#[cfg_attr(feature = "serde", derive(serde::Deserialize, serde::Serialize))] 
+#[cfg_attr(feature = "serde", derive(serde::Deserialize, serde::Serialize))]
 pub enum PayloadLength {
     /// Constant length payloads use implicit headers
     Constant(u16),