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Add Xtensa arch support #4654
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Add Xtensa arch support #4654
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Yes, though let's wait until the Capstone PRs are merged. |
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I didn't review the ESIL file since I hope we remove it soon. As long as it doesn't break anything, everything is fine in that file.
return 3; | ||
case RZ_ANALYSIS_ARCHINFO_MAX_OP_SIZE: | ||
return 6; | ||
// case RZ_ANALYSIS_ARCHINFO_TEXT_ALIGN: |
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Either implement or remove?
// case RZ_ANALYSIS_ARCHINFO_DATA_ALIGN: | ||
// return 0; | ||
case RZ_ANALYSIS_ARCHINFO_CAN_USE_POINTERS: | ||
return true; |
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Return types do not match
@@ -13,6 +13,7 @@ RUN | |||
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NAME=xtensa stackframe | |||
FILE=malloc://512 | |||
BROKEN=1 |
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Please don't forget to fix it eventually
@@ -444,7 +444,7 @@ a____ 16 32 64 x86.nasm LGPL3 X86 nasm assembler | |||
a____ 16 32 64 x86.nz LGPL3 x86 handmade assembler | |||
_dA__ 16 xap PD XAP4 RISC (CSR) | |||
_dA__ 32 xcore BSD Capstone XCore disassembler (by pancake) | |||
_dAe_ 32 xtensa GPL3 XTensa CPU | |||
_dA_I 32 xtensa LGPL3 Capstone Xtensa disassembly plugin |
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Add yourself as the author maybe?
} | ||
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void xtensa_disassemble_fini(XtensaContext *self) { | ||
if (!self->insn) |
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Missing {}
// SPDX-FileCopyrightText: 2024 billow <[email protected]> | ||
// SPDX-License-Identifier: LGPL-3.0-only | ||
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#ifndef RIZIN_XTENSA_H |
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Could use just RZ_XTENSA_H
maybe?
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