Release Notes
Flexible Software Package (FSP) for Renesas RZ/V MPU Series, version 3.1.0.
All installers are available in the Assets section of this release.
Refer to the README.md in the FSP root folder for setup instructions, hardware details, and related links.
Tools
Arm GNU Toolchain : 13.3.1.arm-13-24
Libgen Update for GNU ARM Embeeded Toolchains
Important Notice
- Please do not update J-Link Firmware beyond version 7.96e, as we have only confirmed RZ/V FSP's correct functionality with v7.96e.
New Features
- Support for new development kits:
- RZ/V2N Evaluation Board Kit
Fixes and Improvements
- CANFD: Fixed an issue that FIFO Depth property is not able to set to 0 stages, even if FIFO is configured to Disabled, and add 0 stages to the list of FIFO Depth properties. Then, depending on the FIFO settings, the data read by calling read function could be an uncertain value because the size of FIFO could become larger than the buffer implemented in CANFD hardware. [Target device: RZ/V2L(Cortex-M33), RZ/V2H(Cortex-M33), RZ/V2H(Cortex-R8) and RZ/V2N(Cortex-M33)]
- I3C_B: Fixed an issue that initial state of the communication I/F pins may become unstable, added an internal reset assert in open process to mask the unstable period of the I/F pins. [Target device: RZ/V2H(Cortex-M33) and RZ/V2N(Cortex-M33)]
- PinConfigurator: Corrected settings of IO buffer drive strength in accordance with the update of User's Manual. [Target device: RZ/V2H(Cortex-M33), RZ/V2H(Cortex-R8) and RZ/V2N(Cortex-M33)]
Deprecations
- None
Known Issues
- None
Third Party Software
These third party software solutions are included alongside FSP.
Amazon FreeRTOS Kernel: 10.6.1
Supported Components
The device support for each module is as follows:
Category | Components | RZ/V2L(Cortex-M33) | RZ/V2H(Cortex-M33) | RZ/V2H(Cortex-R8) | RZ/V2N(Cortex-M33) |
---|---|---|---|---|---|
OS | FreeRTOS | ✓ | ✓ | ✓ | ✓ |
Middleware | OpenAMP | ✓ | ✓ | ✓ | ✓ |
Sensor(rm_hs300x, rm_hs400x, rm_comms_i2c, rm_zmod4xxx) | ✓ | NA | NA | NA | |
HAL Driver | ADC_C(r_adc_c) | ✓ | NA | NA | NA |
ADC_E(r_adc_e) | NA | ✓ | ✓ | ✓ | |
CANFD(r_canfd) | ✓ | ✓ | ✓ | ✓ | |
CMTW(r_cmtw) | NA | ✓ | ✓ | ✓ | |
CRC(r_crc) | NA | ✓ | ✓ | ✓ | |
DMAC_B(r_dmac_b) | ✓ | ✓ | ✓ | ✓ | |
ELC(r_elc) | NA | ✓ | ✓ | ✓ | |
GPT(r_gpt) | ✓ | ✓ | ✓ | ✓ | |
GTM(r_gtm) | ✓ | ✓ | ✓ | ✓ | |
I3C_B(r_i3c_b) | NA | ✓ | NA | ✓ | |
INTC_IRQ(r_intc_irq) | ✓ | ✓ | ✓ | ✓ | |
INTC_NMI(r_intc_nmi) | NA | ✓ | ✓ | ✓ | |
INTC_TINT(r_intc_tint) | NA | ✓ | ✓ | ✓ | |
MHU(r_mhu_ns, r_mhu_s, r_mhu_ns_swint_get, r_mhu_ns_swint_set) | ✓ | NA | NA | NA | |
MHU_B(r_mhu_b_ns, r_mhu_b_s, r_mhu_b_ns_swint_get, r_mhu_b_ns_swint_set) | NA | ✓ | ✓ | ✓ | |
MTU3(r_mtu3) | ✓ | NA | NA | NA | |
PDM(r_pdm) | NA | ✓ | NA | ✓ | |
POEG(r_poeg) | ✓ | ✓ | ✓ | ✓ | |
I2C Master(r_riic_master) | ✓ | ✓ | ✓ | ✓ | |
I2C Slave(r_riic_slave) | NA | ✓ | ✓ | ✓ | |
RSPI(r_rspi) | ✓ | NA | NA | NA | |
RTC(r_rtc) | NA | ✓ | ✓ | ✓ | |
SCIF(r_scif_uart) | ✓ | ✓ | ✓ | ✓ | |
SCI_B(r_sci_b_i2c, r_sci_b_spi, r_sci_b_uart) | NA | ✓ | ✓ | ✓ | |
SPI_B(r_spi_b) | NA | ✓ | ✓ | ✓ | |
TSU_B(r_tsu_b) | NA | ✓ | NA | ✓ | |
WDT(r_wdt) | NA | ✓ | ✓ | ✓ | |
xSPI_qspi(r_xspi_qspi) | NA | ✓ | NA | ✓ |
Knowledge Base
Visit our knowledge base for other technical updates.
MD5 Checksums
- RZV_FSP_Packs_v3.1.0.zip 14b476924ad52f571cbff3f69c3ac445
- RZV_FSP_Packs_v3.1.0.exe de48fb276c432c47b9b83f9fbb1ea1df
- fsp_documentation_v3.1.0.zip 87702286227e6ea99380cf87d011115c