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PR 2: ARM64 MSUB/MADD Fix

Title: Fix ARM64 MSUB and MADD instruction assembly

Description:

## Description

Fixes ARM64 assembler for `MSUB` and `MADD` instructions, resolving the main issues in #24640.

## Problem

The ARM64 assembler could not assemble `MSUB` and `MADD` instructions:
```sh
# Before - assembly failed
$ rasm2 -a arm -b 64 'msub x7, x8, x9, x5'
ERROR: Cannot assemble 'msub x7, x8, x9, x5' at line 1

# Disassembly worked
$ rasm2 -a arm -b 64 -d '0795099b'
msub x7, x8, x9, x5

radare and others added 2 commits October 22, 2025 08:16
- Add math4() function for 4-register encoding (Rd, Rn, Rm, Ra)
- Fix MSUB: use math4() with opcode 0x9b008000 instead of math()
  * pancake's original fix used math() which only handles 3 registers
  * MSUB needs 4 registers: msub x7, x8, x9, x5
- Fix MADD: use math4() with opcode 0x9b000000
  * Makes assembler output match Capstone disassembler

Fixes radareorg#24640 (MSUB/MADD part)

Test:
  rasm2 -a arm -b 64 'msub x7, x8, x9, x5'  # 0795099b
  rasm2 -a arm -b 64 -d '0795099b'          # msub x7, x8, x9, x5
  rasm2 -a arm -b 64 'madd x7, x8, x9, x5'  # 0715099b
  rasm2 -a arm -b 64 -d '0715099b'          # madd x7, x8, x9, x5
@trufae
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trufae commented Oct 22, 2025

i have another partial PR fixing arm64 assembler instructions and fixing one breaks others. so definitively this needs some more attention

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3 participants