Fix simulation. Now starting but still not functional. #587
reviewdog [verible-verilog-lint] report
reported by reviewdog 🐶
Findings (11)
hw/dma_core_wrap.sv|8 col 8| Declared module does not match the first dot-delimited component of file name: "dma_core_wrap" [Style: file-names] [module-filename]
hw/dma_core_wrap.sv|13 col 26| Non-type parameter names must be styled with CamelCase or ALL_CAPS [Style: constants] [parameter-name-style]
hw/dma_core_wrap.sv|14 col 26| Non-type parameter names must be styled with CamelCase or ALL_CAPS [Style: constants] [parameter-name-style]
hw/dma_core_wrap.sv|229 col 10| File must end with a newline. [Style: posix-file-endings] [posix-eof]
hw/astral_wrap.sv|328 col 101| Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]
hw/astral_wrap.sv|345 col 101| Line length exceeds max: 100; is: 116 [Style: line-length] [line-length]
hw/astral_wrap.sv|375 col 27| Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
hw/astral_wrap.sv|376 col 1| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/astral_wrap.sv|413 col 46| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/astral_wrap.sv|427 col 101| Line length exceeds max: 100; is: 139 [Style: line-length] [line-length]
hw/astral_wrap.sv|456 col 1| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Filtered Findings (0)
Annotations
Check warning on line 8 in hw/dma_core_wrap.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/dma_core_wrap.sv#L8
Declared module does not match the first dot-delimited component of file name: "dma_core_wrap" [Style: file-names] [module-filename]
Raw output
message:"Declared module does not match the first dot-delimited component of file name: \"dma_core_wrap\" [Style: file-names] [module-filename]" location:{path:"hw/dma_core_wrap.sv" range:{start:{line:8 column:8}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:8 column:8} end:{line:9}} text:"module dma_core_wrap #(\n"}
Check warning on line 13 in hw/dma_core_wrap.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/dma_core_wrap.sv#L13
Non-type parameter names must be styled with CamelCase or ALL_CAPS [Style: constants] [parameter-name-style]
Raw output
message:"Non-type parameter names must be styled with CamelCase or ALL_CAPS [Style: constants] [parameter-name-style]" location:{path:"hw/dma_core_wrap.sv" range:{start:{line:13 column:26}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 14 in hw/dma_core_wrap.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/dma_core_wrap.sv#L14
Non-type parameter names must be styled with CamelCase or ALL_CAPS [Style: constants] [parameter-name-style]
Raw output
message:"Non-type parameter names must be styled with CamelCase or ALL_CAPS [Style: constants] [parameter-name-style]" location:{path:"hw/dma_core_wrap.sv" range:{start:{line:14 column:26}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 229 in hw/dma_core_wrap.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/dma_core_wrap.sv#L229
File must end with a newline. [Style: posix-file-endings] [posix-eof]
Raw output
message:"File must end with a newline. [Style: posix-file-endings] [posix-eof]" location:{path:"hw/dma_core_wrap.sv" range:{start:{line:229 column:10}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:229 column:10} end:{line:230}} text:"endmodule\n"}
Check warning on line 328 in hw/astral_wrap.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/astral_wrap.sv#L328
Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]" location:{path:"hw/astral_wrap.sv" range:{start:{line:328 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 345 in hw/astral_wrap.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/astral_wrap.sv#L345
Line length exceeds max: 100; is: 116 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 116 [Style: line-length] [line-length]" location:{path:"hw/astral_wrap.sv" range:{start:{line:345 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 375 in hw/astral_wrap.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/astral_wrap.sv#L375
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
Raw output
message:"Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]" location:{path:"hw/astral_wrap.sv" range:{start:{line:375 column:27}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 376 in hw/astral_wrap.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/astral_wrap.sv#L376
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"hw/astral_wrap.sv" range:{start:{line:376 column:1}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:376 column:1} end:{line:377}} text:"\n"}
Check warning on line 413 in hw/astral_wrap.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/astral_wrap.sv#L413
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"hw/astral_wrap.sv" range:{start:{line:413 column:46}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:413 column:46} end:{line:414}} text:" assign fll_scan_jtag_in = '{default: 1'b0};\n"}
Check warning on line 427 in hw/astral_wrap.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/astral_wrap.sv#L427
Line length exceeds max: 100; is: 139 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 139 [Style: line-length] [line-length]" location:{path:"hw/astral_wrap.sv" range:{start:{line:427 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 456 in hw/astral_wrap.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/astral_wrap.sv#L456
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"hw/astral_wrap.sv" range:{start:{line:456 column:1}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:456 column:1} end:{line:457}} text:"\n"}