D-Link DIR-505 support, fixes in Makefile

pepe2k · Aug 16, 2013 · d2bb828 · d2bb828
1 parent 06ab7f4
commit d2bb828
Show file tree

Hide file tree

Showing 12 changed files with 245 additions and 31 deletions.
diff --git a/Makefile b/Makefile
@@ -87,6 +87,15 @@ tplink_wdr3600_43x0:
 	@cp $(BUILD_TOPDIR)/u-boot/tuboot.bin $(BUILD_TOPDIR)/bin/temp.bin
 	@make show_size
 
+dlink_dir505:	export UBOOT_FILE_NAME=uboot_for_d-link_dir-505
+dlink_dir505:	export MAX_UBOOT_SIZE=64
+dlink_dir505:	export COMPRESSED_UBOOT=1
+dlink_dir505:
+	@cd $(BUILD_TOPDIR)/u-boot/ && $(MAKECMD) dir505_config
+	@cd $(BUILD_TOPDIR)/u-boot/ && $(MAKECMD) ENDIANNESS=-EB V=1 all
+	@cp $(BUILD_TOPDIR)/u-boot/tuboot.bin $(BUILD_TOPDIR)/bin/temp.bin
+	@make show_size
+
 8devices_carambola2:	export UBOOT_FILE_NAME=uboot_for_8devices_carambola2
 8devices_carambola2:	export MAX_UBOOT_SIZE=256
 8devices_carambola2:

diff --git a/README.md b/README.md
@@ -56,7 +56,7 @@ Currently supported devices:
   - TP-Link TL-MR3220 v2
 
 - **Atheros AR1311 (similar to AR9331)**
-  - ~~D-Link DIR-505 H/W ver. A1~~, [photos in my gallery](http://galeria.tech-blog.pl/D-Link_DIR-505/)
+  - D-Link DIR-505 H/W ver. A1, [photos in my gallery](http://galeria.tech-blog.pl/D-Link_DIR-505/)
 
 - **Atheros AR9344**:
   - TP-Link TL-WDR3600 v1

diff --git a/u-boot/Makefile b/u-boot/Makefile
@@ -289,8 +289,6 @@ endif
 	# don't show info about console (in, out, err...)
 	@echo "#define CFG_CONSOLE_INFO_QUIET"                 >> include/config.h
 
-	@./mkconfig -a ap121 mips mips ap121 ar7240 ar7240
-
 wr703n_config : unconfig hornet_common_config
 	@echo '======= Configuring for TP-Link TL-WR703N at:' `date` '======='
 	@echo "#define CONFIG_FOR_TPLINK_WR703N_V1          1" >> include/config.h
@@ -299,6 +297,8 @@ wr703n_config : unconfig hornet_common_config
 	@echo "#define GPIO_RST_BUTTON_BIT                 11" >> include/config.h
 	@echo "#define DEFAULT_FLASH_SIZE_IN_MB             4" >> include/config.h
 	@echo "#define BOARD_CUSTOM_STRING                  \"AP121 (AR9331) U-Boot for TL-WR703N\"" >> include/config.h
+
+	@./mkconfig -a ap121 mips mips ap121 ar7240 ar7240
 
 wr720n_v3_CH_config : unconfig hornet_common_config
 	@echo '======= Configuring for TP-Link TL-WR720N v3 CH at:' `date` '======='
@@ -308,6 +308,8 @@ wr720n_v3_CH_config : unconfig hornet_common_config
 	@echo "#define GPIO_RST_BUTTON_BIT                 11" >> include/config.h
 	@echo "#define DEFAULT_FLASH_SIZE_IN_MB             4" >> include/config.h
 	@echo "#define BOARD_CUSTOM_STRING                  \"AP121 (AR9331) U-Boot for TL-WR720N v3 CH\"" >> include/config.h
+
+	@./mkconfig -a ap121 mips mips ap121 ar7240 ar7240
 
 wr710n_config : unconfig hornet_common_config
 	@echo '======= Configuring for TP-Link TL-WR710N at:' `date` '======='
@@ -317,6 +319,8 @@ wr710n_config : unconfig hornet_common_config
 	@echo "#define GPIO_RST_BUTTON_BIT                 11" >> include/config.h
 	@echo "#define DEFAULT_FLASH_SIZE_IN_MB             8" >> include/config.h
 	@echo "#define BOARD_CUSTOM_STRING                  \"AP121 (AR9331) U-Boot for TL-WR710N\"" >> include/config.h
+
+	@./mkconfig -a ap121 mips mips ap121 ar7240 ar7240
 
 mr3020_config : unconfig hornet_common_config
 	@echo '======= Configuring for TP-Link TL-MR3020 at:' `date` '======='
@@ -332,6 +336,8 @@ mr3020_config : unconfig hornet_common_config
 	@echo "#define GPIO_RST_BUTTON_BIT                 11" >> include/config.h
 	@echo "#define DEFAULT_FLASH_SIZE_IN_MB             4" >> include/config.h
 	@echo "#define BOARD_CUSTOM_STRING                  \"AP121 (AR9331) U-Boot for TL-MR3020\"" >> include/config.h
+
+	@./mkconfig -a ap121 mips mips ap121 ar7240 ar7240
 
 mr3040_config : unconfig hornet_common_config
 	@echo '======= Configuring for TP-Link TL-MR3040 at:' `date` '======='
@@ -345,6 +351,8 @@ mr3040_config : unconfig hornet_common_config
 	@echo "#define GPIO_RST_BUTTON_BIT                 11" >> include/config.h
 	@echo "#define DEFAULT_FLASH_SIZE_IN_MB             4" >> include/config.h
 	@echo "#define BOARD_CUSTOM_STRING                  \"AP121 (AR9331) U-Boot for TL-MR3040\"" >> include/config.h
+
+	@./mkconfig -a ap121 mips mips ap121 ar7240 ar7240
 
 mr10u_config : unconfig hornet_common_config
 	@echo '======= Configuring for TP-Link TL-MR10U at:' `date` '======='
@@ -354,6 +362,8 @@ mr10u_config : unconfig hornet_common_config
 	@echo "#define GPIO_RST_BUTTON_BIT                 11" >> include/config.h
 	@echo "#define DEFAULT_FLASH_SIZE_IN_MB             4" >> include/config.h
 	@echo "#define BOARD_CUSTOM_STRING                  \"AP121 (AR9331) U-Boot for TL-MR10U\"" >> include/config.h
+
+	@./mkconfig -a ap121 mips mips ap121 ar7240 ar7240
 
 wr740n_v4_config : unconfig hornet_common_config
 	@echo '======= Configuring for TP-Link TL-WR740N v4 at:' `date` '======='
@@ -377,6 +387,8 @@ wr740n_v4_config : unconfig hornet_common_config
 	@echo "#define GPIO_RST_BUTTON_BIT                 11" >> include/config.h
 	@echo "#define DEFAULT_FLASH_SIZE_IN_MB             4" >> include/config.h
 	@echo "#define BOARD_CUSTOM_STRING                  \"AP121 (AR9331) U-Boot for TL-WR74xN/D v4\"" >> include/config.h
+
+	@./mkconfig -a ap121 mips mips ap121 ar7240 ar7240
 
 mr3220_v2_config : unconfig hornet_common_config
 	@echo '======= Configuring for TP-Link TL-MR3220 v2 at:' `date` '======='
@@ -402,6 +414,23 @@ mr3220_v2_config : unconfig hornet_common_config
 	@echo "#define GPIO_RST_BUTTON_BIT                 11" >> include/config.h
 	@echo "#define DEFAULT_FLASH_SIZE_IN_MB             4" >> include/config.h
 	@echo "#define BOARD_CUSTOM_STRING                  \"AP121 (AR9331) U-Boot for TL-MR3220 v2\"" >> include/config.h
+
+	@./mkconfig -a ap121 mips mips ap121 ar7240 ar7240
+
+dir505_config : unconfig hornet_common_config
+	@echo '======= Configuring for D-Link DIR-505 at:' `date` '======='
+	@echo "#define CONFIG_FOR_DLINK_DIR505_A1           1" >> include/config.h
+	@echo "#define GPIO_SYS_LED_BIT                    27" >> include/config.h
+	@echo "#define GPIO_SYS_LED_ON                      0" >> include/config.h
+
+	# we will use WPS button instead of reset
+	@echo "#define GPIO_RST_BUTTON_BIT                 11" >> include/config.h
+	@echo "#define GPIO_RST_BUTTON_IS_ACTIVE_LOW        1" >> include/config.h
+
+	@echo "#define DEFAULT_FLASH_SIZE_IN_MB             8" >> include/config.h
+	@echo "#define BOARD_CUSTOM_STRING                  \"AP121 (AR9331) U-Boot for DIR-505\"" >> include/config.h
+
+	@./mkconfig -a ap121 mips mips ap121 ar7240 ar7240
 
 carambola2_config : unconfig hornet_common_config
 	@echo '======= Configuring for 8devices Carambola 2 at:' `date` '======='
@@ -422,6 +451,8 @@ carambola2_config : unconfig hornet_common_config
 
 	@echo "#define DEFAULT_FLASH_SIZE_IN_MB            16" >> include/config.h
 	@echo "#define BOARD_CUSTOM_STRING                  \"AP121 (AR9331) U-Boot for CARAMBOLA2 v1\"" >> include/config.h
+
+	@./mkconfig -a ap121 mips mips ap121 ar7240 ar7240
 
 db12x_config : unconfig
 	@echo '======= Configuring for TP-Link TL-WDR3600/43x0 at:' `date` '======='

diff --git a/u-boot/board/ar7240/ap121/ap121.c b/u-boot/board/ar7240/ap121/ap121.c
@@ -29,6 +29,8 @@ void led_toggle(void){
 	gpio ^= 1 << GPIO_SYS_LED_BIT;
 #elif defined(CONFIG_FOR_TPLINK_WR740N_V4) || defined(CONFIG_FOR_TPLINK_MR3220_V2)
 	gpio ^= 1 << GPIO_SYS_LED_BIT;
+#elif defined(CONFIG_FOR_DLINK_DIR505_A1)
+	gpio ^= 1 << GPIO_SYS_LED_BIT;
 #elif defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
 	gpio ^= 1 << GPIO_WLAN_LED_BIT;
 #else
@@ -69,6 +71,8 @@ void all_led_on(void){
 	#ifdef CONFIG_FOR_TPLINK_MR3220_V2
 	SETBITVAL(gpio, GPIO_USB_LED_BIT, GPIO_USB_LED_ON);
 	#endif
+#elif defined(CONFIG_FOR_DLINK_DIR505_A1)
+	SETBITVAL(gpio, GPIO_SYS_LED_BIT, GPIO_SYS_LED_ON);
 #elif defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
 	SETBITVAL(gpio, GPIO_WLAN_LED_BIT, GPIO_WLAN_LED_ON);
 #else
@@ -109,6 +113,8 @@ void all_led_off(void){
 	#ifdef CONFIG_FOR_TPLINK_MR3220_V2
 	SETBITVAL(gpio, GPIO_USB_LED_BIT, !GPIO_USB_LED_ON);
 	#endif
+#elif defined(CONFIG_FOR_DLINK_DIR505_A1)
+	SETBITVAL(gpio, GPIO_SYS_LED_BIT, !GPIO_SYS_LED_ON);
 #elif defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
 	SETBITVAL(gpio, GPIO_WLAN_LED_BIT, !GPIO_WLAN_LED_ON);
 #else
@@ -271,6 +277,20 @@ void gpio_config(void){
 	//ar7240_reg_wr (AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) & 0xffe7e07f));
 #elif defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
 	// TODO: check GPIO config for C2
+#elif defined(CONFIG_FOR_DLINK_DIR505_A1)
+
+	/* LED's GPIOs on DIR-505:
+	 *
+	 * 26	=> RED LED
+	 * 27	=> GREEN LED
+	 *
+	 */
+
+	// set GPIO_OE
+	ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0xC000000));
+
+	// turn off RED LED, we don't need it
+	ar7240_reg_wr(AR7240_GPIO_OUT, (ar7240_reg_rd(AR7240_GPIO_OUT) | (0x1 << 26)));
 #else
 	#error "Custom GPIO config in gpio_config() not defined!"
 #endif

diff --git a/u-boot/common/cmd_bootm.c b/u-boot/common/cmd_bootm.c
@@ -67,7 +67,8 @@ static int image_info(unsigned long addr);
 image_header_t header;
 ulong load_addr = CFG_LOAD_ADDR; /* default load address */
 
-#if !defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
+#if !defined(CONFIG_FOR_8DEVICES_CARAMBOLA2) && \
+	!defined(CONFIG_FOR_DLINK_DIR505_A1)
 void fake_image_header(image_header_t *hdr, tplink_image_header_t *tpl_hdr){
 	memset(hdr, 0, sizeof(image_header_t));
 
@@ -86,14 +87,15 @@ void fake_image_header(image_header_t *hdr, tplink_image_header_t *tpl_hdr){
 
 	strncpy((char *)hdr->ih_name, (char *)tpl_hdr->signiture_1, IH_NMLEN);
 }
-#endif /* if !defined(CONFIG_FOR_8DEVICES_CARAMBOLA2) */
+#endif /* if !defined(CONFIG_FOR_8DEVICES_CARAMBOLA2) && !defined(CONFIG_FOR_DLINK_DIR505_A1) */
 
 int do_bootm(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]){
 	ulong addr, data, len;
 	uint unc_len = CFG_BOOTM_LEN;
 	int i;
 	image_header_t *hdr = &header;
-#if !defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
+#if !defined(CONFIG_FOR_8DEVICES_CARAMBOLA2) && \
+	!defined(CONFIG_FOR_DLINK_DIR505_A1)
 	tplink_image_header_t *fileTag;
 #endif
 
@@ -105,7 +107,8 @@ int do_bootm(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]){
 
 	printf("Booting image at: 0x%08lX\n", addr);
 
-#if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
+#if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2) || \
+	defined(CONFIG_FOR_DLINK_DIR505_A1)
 	memmove(&header, (char *)addr, sizeof(image_header_t));
 	print_image_hdr(hdr);
 
@@ -210,7 +213,8 @@ static void fixup_silent_linux(){
 }
 #endif /* CONFIG_SILENT_CONSOLE */
 
-#if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
+#if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2) || \
+	defined(CONFIG_FOR_DLINK_DIR505_A1)
 static void print_type(image_header_t *hdr){
 	char *os, *arch, *type, *comp;
 
@@ -387,7 +391,7 @@ void print_image_hdr(tplink_image_header_t *hdr){
 	print_size(ntohl(hdr->kernelLen), "\n");
 	printf("   Load address: 0x%08X\n   Entry point:  0x%08X\n\n", ntohl(hdr->kernelTextAddr), ntohl(hdr->kernelEntryPoint));
 }
-#endif /* defined(CONFIG_FOR_8DEVICES_CARAMBOLA2) */
+#endif /* defined(CONFIG_FOR_8DEVICES_CARAMBOLA2) || defined(CONFIG_FOR_DLINK_DIR505_A1) */
 
 #if (CONFIG_COMMANDS & CFG_CMD_IMI)
 int do_iminfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]){

diff --git a/u-boot/cpu/mips/ar7240/ag7240.c b/u-boot/cpu/mips/ar7240/ag7240.c
@@ -451,9 +451,9 @@ static void ag7240_halt(struct eth_device *dev) {
  */
 static void ag7240_get_ethaddr(struct eth_device *dev) {
 	unsigned char *mac = dev->enetaddr;
+#ifdef OFFSET_MAC_ADDRESS
 	unsigned char buffer[6];
 
-#ifdef OFFSET_MAC_ADDRESS
 	// get MAC address from flash and check it
 	memcpy(buffer, (void *)(CFG_FLASH_BASE + OFFSET_MAC_DATA_BLOCK + OFFSET_MAC_ADDRESS), 6);
 
@@ -484,7 +484,7 @@ static void ag7240_get_ethaddr(struct eth_device *dev) {
 	mac[3] = 0x09;
 	mac[4] = 0x0b;
 	mac[5] = 0xad;
-	printf("## Error: Using fixed MAC address!\n");
+	printf("## Error: using fixed MAC address!\n");
 #endif
 }
 

diff --git a/u-boot/cpu/mips/ar7240/hornet_ddr_init.S b/u-boot/cpu/mips/ar7240/hornet_ddr_init.S
@@ -49,6 +49,95 @@ hornet_ddr_init:
     li t8, CFG_DDR_CONFIG2_VAL;
     set_mem(0xB8000004,t8);
 
+#if defined(CONFIG_FOR_DLINK_DIR505_A1)
+
+    // DDR2 Paramters
+
+    //D.S 0xB800008C %LONG 0xA59         ;      // Enable DDR2
+    li t8, 0xA59;
+    set_mem(0xB800008C,t8);
+
+    //D.S 0xB8000010 %LONG 0x8           ;      // Precharge All
+    li t8,0x8;
+    set_mem(0xB8000010,t8);
+
+    //D.S 0xB8000090 %LONG 0x0           ;      // Disable High Temperature Self-Refresh Rate
+    //D.S 0xB8000010 %LONG 0x10          ;      // Extended Mode Register 2 Set (EMR2S)
+    li t8, 0x0;
+    set_mem(0xB8000090,t8);
+    li t8, 0x10;
+    set_mem(0xB8000010,t8);
+
+    //D.S 0xB8000094 %LONG 0x0           ;      //
+    //D.S 0xB8000010 %LONG 0x20          ;      // Extended Mode Register 3 Set (EMR3S)
+    li t8, 0x0;
+    set_mem(0xB8000094,t8);
+    li t8, 0x20;
+    set_mem(0xB8000010,t8);
+
+    //D.S 0xB800000C %LONG 0x0           ;      // Enable DLL
+    //D.S 0xB8000010 %LONG 0x2           ;      // Extended Mode Register Set (EMRS)
+    li t8, 0x0;
+    set_mem(0xB800000C , t8);
+    li t8, 0x2;
+    set_mem(0xB8000010, t8);
+
+    //D.S 0xB8000008 %LONG 0x100         ;      // Reset DLL
+    //D.S 0xB8000010 %LONG 0x1           ;      // Mode Register Set (MRS)
+    li t8, 0x100;
+    set_mem(0xB8000008,t8);
+    li t8, 0x1;
+    set_mem(0xB8000010, t8);
+
+    //D.S 0xB8000010 %LONG 0x8           ;      // Precharge All
+    //D.S 0xB8000010 %LONG 0x4           ;      // Auto Refresh
+    //D.S 0xB8000010 %LONG 0x4           ;      // Auto Refresh
+    li t8, 0x8;
+    set_mem(0xB8000010, t8);
+    li t8, 0x4;
+    set_mem(0xB8000010, t8);
+    li t8, 0x4;
+    set_mem(0xB8000010, t8);
+
+    //D.S 0xB8000008 %LONG 0xa33         ;      // Write recovery (WR) 6 clock, CAS Latency 3, Burst Length 8
+    //D.S 0xB8000010 %LONG 0x1           ;      // Mode Register Set (MRS)
+    li t8, 0xa33;
+    set_mem( 0xB8000008, t8);
+    li t8, 0x1;
+    set_mem( 0xB8000010, t8);
+
+    //D.S 0xB800000C %LONG 0x382         ;      // E7,E8,E9 equal to 1(Enable OCD defaults), Enable DLL, Reduced Drive Strength
+    //D.S 0xB8000010 %LONG 0x2           ;      // Extended Mode Register Set (EMRS)
+    li t8, 0x382;
+    set_mem(0xB800000C,t8);
+    li t8, 0x2;
+    set_mem(0xB8000010,t8);
+
+    //D.S 0xB800000C %LONG 0x402         ;      // E7,E8,E9 equal to 0(OCD exit), Enable DLL, Reduced Drive Strength
+    //D.S 0xB8000010 %LONG 0x2           ;      // Extended Mode Register Set (EMRS)
+    li t8, 0x402;
+    set_mem(0xB800000C,t8);
+    li t8, 0x2;
+    set_mem(0xB8000010,t8);
+
+    //D.S 0xB8000014 %LONG 0x4960/0x4f10 ;      // Refresh control. Bit 14 is enable. Bits<13:0> Refresh time
+    li t8, CFG_DDR_REFRESH_VAL;
+    set_mem( 0xB8000014, t8);
+
+    //D.S 0xB800001C %LONG 0x08          ;       // DQS 0 Tap Control (needs tuning)
+    li t8, CFG_DDR_TAP0_VAL;
+    set_mem( 0xB800001C, t8);
+
+    //D.S 0xB8000020 %LONG 0x09          ;       // DQS 1 Tap Control (needs tuning)
+    li t8, CFG_DDR_TAP1_VAL;
+    set_mem( 0xB8000020, t8);
+
+    //D.S 0xB8000018 %LONG 0x00ff        ;      // For 16-bit DDR
+    li t8, 0x00ff;
+    set_mem( 0xB8000018, t8);
+
+#else
+
     // DDR1 Paramters
 
     //D.S 0xB8000010 %LONG 0x8           ;      // precharge
@@ -99,6 +188,8 @@ hornet_ddr_init:
     li t8, 0x00ff;
     set_mem( 0xB8000018, t8);
 
+#endif
+
 	nop
 	jr 	ra
 

diff --git a/u-boot/httpd/httpd.c b/u-boot/httpd/httpd.c
@@ -142,11 +142,17 @@ static int httpd_findandstore_firstchunk(void){
 					printf("Upgrade type: ART\n");
 					webfailsafe_upgrade_type = WEBFAILSAFE_UPGRADE_TYPE_ART;
 
-					// check if have known flash type
+					// if we don't have ART partition offset, it means that it should be
+					// stored on the last 64 KiB block -> in most supported board
+					// the ART partition occupies last 64 KiB block
+#if !defined(WEBFAILSAFE_UPLOAD_ART_ADDRESS)
+					// if we don't know the flash type, we won't allow to update ART,
+					// because we don't know flash size
 					if(info->flash_id == FLASH_CUSTOM){
 						printf("## Error: unknown flash type, can't update ART!\n");
 						webfailsafe_upload_failed = 1;
 					}
+#endif
 
 				} else {
 

diff --git a/u-boot/include/common.h b/u-boot/include/common.h
@@ -194,12 +194,14 @@ int	autoscript (ulong addr);
  * Only TP-Link OFW and OpenWrt for TP-Link routers
  * use different (simply) image header
  */
-#if !defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
+#if !defined(CONFIG_FOR_8DEVICES_CARAMBOLA2) && \
+	!defined(CONFIG_FOR_DLINK_DIR505_A1)
 #include "tpLinuxTag.h"
 #endif
 
 /* common/cmd_bootm.c */
-#if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
+#if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2) || \
+	defined(CONFIG_FOR_DLINK_DIR505_A1)
 void print_image_hdr(image_header_t *hdr);
 #else
 void print_image_hdr(tplink_image_header_t *hdr);