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Add compile-time / macros that can do loops and conditionals
#1326
opened Nov 3, 2024 by
jafingerhut
1 of 9 tasks
Type nesting rule for extern, parser, control, and package types
#1324
opened Nov 2, 2024 by
jaehyun1ee
Consider adding Verilog style
+:
(and possibly -:
) slice operator(s)
future enhancement
#1304
opened Sep 5, 2024 by
ChrisDodd
5 of 9 tasks
CI: Create a CI job that builds the spec PDF and HTML for a PR
ldwg-discussion
Plan to discuss at next LDWG
#1301
opened Aug 14, 2024 by
vlstill
Misleading code example for 8.24. Operations on types that are type variables
#1295
opened Jul 31, 2024 by
jaehyun1ee
Document restriction that numeric priorities may not be specified within
const entries
#1292
opened Jul 10, 2024 by
jafingerhut
Investigate whether PDF/HTML generated for all versions are in git repo history
#1287
opened Jun 23, 2024 by
jafingerhut
Allow compile-time resolvable expressions for switch labels?
question
#1281
opened May 9, 2024 by
fruffy
remove overflow warning when using signed integer literals of same representation size?
#1269
opened Dec 19, 2023 by
AndrzejSawula
Language for specifying P4_16 architectures
future enhancement
#1268
opened Oct 2, 2023 by
jafingerhut
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