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199 Open 876 Closed
199 Open 876 Closed
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Issues list

[BUG] Case with do-not-care Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2681 opened Dec 28, 2024 by likeamahoney
1 task done
[BUG] Privilege level are not covered Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2680 opened Dec 28, 2024 by likeamahoney
1 task done
CVA6 Genus Support notCV32A65X It is not an CV32A65X issue
#2668 opened Dec 15, 2024 by rsar97
1
[BUG] PMPCFG : Dead code in pmp module Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2665 opened Dec 12, 2024 by AyoubJalali
1 task done
5
[BUG] [CV32A65X] Writes into PMPADDR registers do not follow specification Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2657 opened Dec 9, 2024 by zchamski
1 task done
1
1
[BUG] Incorrect handling of PMPADDR register reads in NA4 / NAPOT address matching modes notCV32A65X It is not an CV32A65X issue Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2656 opened Dec 9, 2024 by zchamski
1 task done
1
Debugging read the docs build flow could be easier Component:Doc For issues in the Documentation (e.g. for README.md files)
#2650 opened Dec 4, 2024 by valentinThomazic
@JeanRochCoulon
4
[BUG] Result of riscv_unaligned_load_store_test is inconsistent Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2645 opened Dec 3, 2024 by valentinThomazic
1 task done
1
[BUG] spike : Update CVXIF instruction Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2626 opened Nov 21, 2024 by AyoubJalali
1 task done
@zchamski
Out of date URL in CSR DV Plan Component:Doc For issues in the Documentation (e.g. for README.md files) Component:Verif For issues in the verification environment or test cases (e.g. for testbench, C code, etc.) Good First Issue Good first issue to work on if you want to contribute Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2625 opened Nov 21, 2024 by MikeOpenHWGroup
@ASintzoff
1
[BUG] Return address prediction failed Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2620 opened Nov 20, 2024 by AEzzejjari
1 task done
@JeanRochCoulon @ASintzoff
1
[BUG] Boot Linux on Spike Failed Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2610 opened Nov 18, 2024 by jason23g
1 task done
[TASK] Fix riscv-tests with virtual memory on tandem CV64A6 Part: 64bits configuration notCV32A65X It is not an CV32A65X issue
#2605 opened Nov 15, 2024 by valentinThomazic
1 task done
1
[BUG] <title> riscv-test with virtual memory enabled fails on target cv64a6_imafdc_sv39_hpdcache in write-back mode notCV32A65X It is not an CV32A65X issue Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2603 opened Nov 15, 2024 by Bill94l
1 task done
@cfuguet
2
[BUG] Missed case operator range notCV32A65X It is not an CV32A65X issue Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2591 opened Nov 8, 2024 by likeamahoney
1 task done
1
[BUG] Delay in enforcing PMP rules leading to attacker can read 128bits of data in PMP region Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2567 opened Oct 25, 2024 by riscv914
1 task done
[BUG] Writing to the cache line of current executing instructions will crash the processor Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2566 opened Oct 25, 2024 by riscv914
1 task done
timing loop warning when synthesis Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2557 opened Oct 21, 2024 by hhhsiang
1 task done
[BUG] RVFI agent & tandem mode simulation performance degradation Component:SpikeTandem Issue that impacts Spike Tandem operation CV32A60AX Part: Application configuration (former "step1") Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2556 opened Oct 17, 2024 by AnouarZajni
1 task done
@zchamski
[BUG] error when synthesis Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2544 opened Oct 14, 2024 by hhhsiang
1 task done
5
[BUG] <Error in Makefile> Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2542 opened Oct 11, 2024 by Hasan0712
1 task done
1
Error generating fpga bitsream Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2535 opened Oct 7, 2024 by daksith
1 task done
4
[BUG] VERILATOR_INSTALL_DIR is not set proprely in setup-env.sh Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2534 opened Oct 7, 2024 by Mabdalshakour
1 task done
@valentinThomazic
1
[BUG] Spike tandem simulation not working as expected with the Verilator Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2526 opened Oct 4, 2024 by jason23g
1 task done
5
[BUG] Jump to Misaligned Address Fails to Trigger Exception Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
#2505 opened Sep 22, 2024 by riscv914
1 task done
@ASintzoff
1
ProTip! What’s not been updated in a month: updated:<2024-11-30.