-
Notifications
You must be signed in to change notification settings - Fork 698
/
.gitmodules
51 lines (51 loc) · 2.12 KB
/
.gitmodules
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
[submodule "corev_apu/axi_mem_if"]
path = corev_apu/axi_mem_if
url = https://github.com/pulp-platform/axi_mem_if.git
[submodule "corev_apu/register_interface"]
path = corev_apu/register_interface
url = https://github.com/pulp-platform/register_interface.git
[submodule "corev_apu/fpga/src/apb_uart"]
path = corev_apu/fpga/src/apb_uart
url = https://github.com/pulp-platform/apb_uart.git
[submodule "corev_apu/fpga/src/apb_node"]
path = corev_apu/fpga/src/apb_node
url = https://github.com/pulp-platform/apb_node.git
[submodule "corev_apu/fpga/src/axi2apb"]
path = corev_apu/fpga/src/axi2apb
url = https://github.com/pulp-platform/axi2apb.git
[submodule "corev_apu/fpga/src/axi_slice"]
path = corev_apu/fpga/src/axi_slice
url = https://github.com/pulp-platform/axi_slice.git
[submodule "corev_apu/fpga/src/ariane-ethernet"]
path = corev_apu/fpga/src/ariane-ethernet
url = https://github.com/lowRISC/ariane-ethernet.git
[submodule "corev_apu/src/axi_riscv_atomics"]
path = corev_apu/src/axi_riscv_atomics
url = https://github.com/pulp-platform/axi_riscv_atomics.git
[submodule "corev_apu/riscv-dbg"]
path = corev_apu/riscv-dbg
url = https://github.com/pulp-platform/riscv-dbg.git
[submodule "corev_apu/rv_plic"]
path = corev_apu/rv_plic
url = https://github.com/pulp-platform/rv_plic.git
[submodule "corev_apu/fpga/src/apb_timer"]
path = corev_apu/fpga/src/apb_timer
url = https://github.com/pulp-platform/apb_timer.git
[submodule "corev_apu/tb/common_verification"]
path = corev_apu/tb/common_verification
url = https://github.com/pulp-platform/common_verification.git
[submodule "verif/core-v-verif"]
path = verif/core-v-verif
url = https://github.com/openhwgroup/core-v-verif
[submodule "core/cvfpu"]
path = core/cvfpu
url = https://github.com/openhwgroup/cvfpu.git
[submodule "core/cache_subsystem/hpdcache"]
path = core/cache_subsystem/hpdcache
url = https://github.com/openhwgroup/cv-hpdcache.git
[submodule "verif/sim/dv"]
path = verif/sim/dv
url = https://github.com/google/riscv-dv.git
[submodule "docs/06_cv32a65x_riscv/riscv-isa-manual"]
path = docs/riscv-isa/riscv-isa-manual
url = https://github.com/riscv/riscv-isa-manual.git