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Asmcomp changes from 5.1.1 to 5.2.0
Allowing displaying multi-line backtrace locations in the same way as errors (https://github.com/ocaml-flambda/flambda-backend/pull/2787)
xclerc is working on this.
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10ff471466d590c5304b01f0ed4cc05f8cd4b70d | merge PR10111 |Allowing displaying multi-line backtrace locations in the same way as errors
Extend [@untagged] external attribute to all immediate types (https://github.com/ocaml-flambda/flambda-backend/pull/2785)
xclerc is working on this, but maybe should hand over to frontend devs.
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42035d062c712a3530766cc63efb277514d46af3 | non-merge |Extend [@untagged] external attribute to all immediate types
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Scheduling refactoring (https://github.com/ocaml-flambda/flambda-backend/pull/2774)
xclerc is working on this, but maybe we should just delete the scheduling pass from backend/ since it doesn't apply for either of our supported platforms. Update: we are doing the deletion (https://github.com/ocaml-flambda/flambda-backend/pull/2789).
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0cdac0311f66e013e21647ce51b8714acfbf8b10 | merge PR12669 |Remove global state in asmcomp/schedgen
ThreadSanitizer (https://github.com/ocaml-flambda/flambda-backend/pull/2769)
xclerc is working on this.
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c717b6b47e8308c6ba7037590ac92bc81b53f9e5 | merge PR12114 |Add ThreadSanitizer support -
bd1fb55edb511bc32a07e0301ca9e13b20b6ef6e | merge PR12634 |Simplify TSan backtrace bookkeeping upon raise
Just the Emitaux and X86_proc changes need doing, mshinwell has the rest in hand.
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80ca7e797b44f85e579feafec190e07183c78ed7 | merge PR12640 |Make the module separator used in symbol names configurable
mshinwell has done the Asmpackager parts (they are on the mshinwell/merge-5.2 branch on flambda-backend) and will deal with the remainder of any middle/backend changes here, which are minor.
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c2b87d8fad99f8b069a7164adf291457e29b3426 | merge PR12389 |Unified metadata for compilation files (or no more capitalize_ascii) -
df184c8e281373578e83df0e4e3e9adcecc30ffd | non-merge |#12984: restore the filename computation for companion cmi (#12987)
mshinwell has made the flambda2 and Cmm changes for this.
Currently on the mshinwell/merge-5.2 branch on flambda-backend.
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c2476e3db91949fe1d4355ec69e2860623c860c1 | merge PR12735 |Store both ends of the stack chain in continuations
mshinwell has done Asmpackager and Flambda 2 changes required for this. mshinwell will also deal with Compilenv. That just leaves three files in backend/ by the look of it.
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06de6bc73ffaf95b7cfee898dce649e50a490391 | merge PR12210 |compiler messages: a semantic tag for quoting inline code
Use tabs in generated asm (https://github.com/ocaml-flambda/flambda-backend/pull/2775)
xclerc is working on this. PR merged.
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e3c59ebd906c61e70e69343d1998090940c822a7 | non-merge |asmcomp/*/emit.mlp: use tabs in generated asm where appropriate (#12607)
Atomic loads (https://github.com/ocaml-flambda/flambda-backend/pull/2773)
xclerc is working on this. PR merged.
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3e326faa968a54425f8a76b3f6a5cb1561f15ae3 | merge PR12856 |Fix CSE across atomic loads again -
0c963ceb4d02ea4b01aacf2c30dfdc9d61f28e6a | merge PR12715 |disable CSE for atomic loads -
8d1af245ef46e40652be4509f03ab600405aef63 | non-merge |Instruction scheduling: do not reorder atomic loads (#12248)
mshinwell has made the flambda2 and Cmm changes for this.
Currently on the mshinwell/merge-5.2 branch on flambda-backend.
PR merged.
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08276afddb09dfe2d771bf1a70a2222165e9f6fb | non-merge |Support 16-bit floating-point numbers as elements of bigarrays (#10775)
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bde2dd692a1973f3fcbde4840c8f747b033e3a28 | non-merge |Refactor the computation of stack frame parameters (#12242)
given the ongoing work on the port of selection to CFG, it seems better to delay the port of this change
we should also consider the interactions with the stack checks, in particular whether we should handle frames and checks through the same module
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5f767ecff09c07d02180dbfb382e6fc0f72f5a9c | merge PR13079 |Save and restore frame pointer across Iextcall on ARM64 -
3a13fe6443aaac27007031e8affecf7a08342ddd | non-merge |ARM64: emit stack reallocation code before the body of the function (#12277)
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ec375fe25d4e06433f64acc8fa1dcbcb0b6f9e13 | merge PR12505 |Initialize the block allocated bycaml_alloc_shr_check_gc -
a0bbd7c79f0a1e8b497efb8068782e809409dd8a | merge PR12181 |Simplify calls to caml_int_compare (and similar functions) (was #1809)
vlaviron confirmed we already have:
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04e0e5dcbec8cbdfd250b9667b102673604bc869 | non-merge |Propagate the classification from Rec_check (#12551) -
7810957dec3137ad386bd529c32e61659102398c | merge PR12059 |Correct size for recursive values with branching -
45e6bd6f55004bc4a5e226f93d5825f28dcb397b | non-merge |Compile recursive bindings in Lambda (#12596) -
1537083e31490e0dbfebaf557ca0f8379099e271 | merge PR12608 |Add Constant and Class classifications for recursive bindings
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58024e014570ef6852eb92dda4720a5b0966069f | non-merge |dune: check-typo -
d09c3a7661f58a9464649527c0a4c2ff4bb66869 | non-merge |dune: fix some build errors
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3c141d0d8466d0ed441ea24c7d23d2afe6e03116 | merge PR12914 |s390x: allow builds with llvm/clang -
2bc47925af69140ac38f46516269e9eaf00ef347 | merge PR12915 |ThreadSanitizer support for s390x -
93328fa58c1a946d26995e9cc0c0e58b8c7e5fd0 | merge PR12876 |ThreadSanitizer support for POWER -
dc41ba9321c482569332d4b2ffa7a52359059f5e | non-merge |ThreadSanitizer support for Risc-V (#12907) -
381111257965422f5093a029ecc62ca6c65c639d | merge PR12810 |ThreadSanitizer support for arm64 -
07a4cc354816e676f08c4f83664ab53807a4090c | merge PR12831 |Fix s390x stack reallocation code in PIC mode -
82a04cfdd9785d2a0adfa9c0d28c4d7d4f71f8da | merge PR12667 |64-bit big endian PowerPC ABIv2 support -
5b8651ba254bf382d588b10faad3b47ceb0f3575 | non-merge |Implement leaf functions on POWER (#12601) -
5558e63daf3213d6fc32bd4d6a2ec482e8e2ff89 | merge PR12540 |Remove the SIGTRAP-based bounds checking on POWER -
6ca0dfb4bbdafd70b4f0cca11665609497d2ac27 | merge PR12447 |Remove 32-bit targets from X86_proc.system -
daac33b28fd01eac10428373a72e9978b1caf019 | merge PR12311 |POWER back-end: wrong compilation of FP32 stores -
717d9ba2c84b047e0245c0e960ed5fce8a026f18 | non-merge |Reduced stack alignment for x86-64 and RISC-V (#11239) -
5672ed602dbdc425b327bbadda1e75e6a5c9bad7 | merge PR12276 |Update the POWER port for OCaml 5 -
2700da256d0d7a52aca4e2bf342dc45fb35b867a | merge PR12261 |Minor improvements to the IBM Z / s390x port of OCaml 5 -
3fefff505f171e35ca46d66ccb1b1e567cb44ab0 | non-merge |Reintroduce native compiler for s390x (#11712) -
063894d3fa8f63fedf6959744510e1635dccb3ca | merge PR11846 |Simplify and fix the shadow store reservation on Win64