@@ -67,8 +67,8 @@ let float32_reg_name =
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let num_register_classes = 2
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- let register_class r =
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- match (r. typ : Cmm.machtype_component ) with
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+ let register_class_of_machtype_component typ =
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+ match (typ : Cmm.machtype_component ) with
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| Val | Int | Addr -> 0
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| Vec128 ->
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(* CR mslater: (SIMD) arm64 *)
@@ -78,6 +78,9 @@ let register_class r =
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fatal_error " arm64: got valx2 register"
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| Float | Float32 -> 1
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+ let register_class r =
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+ register_class_of_machtype_component r.typ
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+
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let num_stack_slot_classes = 2
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let stack_slot_class typ =
@@ -134,22 +137,20 @@ let register_name ty r =
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(* Representation of hard registers by pseudo-registers *)
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- let hard_int_reg =
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- let v = Array. make 28 Reg. dummy in
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- for i = 0 to 27 do
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- v.(i) < - Reg. at_location Int (Reg i)
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- done ;
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- v
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- let hard_float_reg_gen kind =
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- let v = Array. make 32 Reg. dummy in
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- for i = 0 to 31 do
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- v.(i) < - Reg. at_location kind (Reg (100 + i))
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+ let hard_reg_gen typ =
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+ let reg_class = register_class_of_machtype_component typ in
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+ let n = num_available_registers.(reg_class) in
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+ let first = first_available_register.(reg_class) in
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+ let v = Array. make n Reg. dummy in
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+ for i = 0 to n - 1 do
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+ v.(i) < - Reg. at_location typ (Reg (first + i))
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done ;
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- v
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+ v
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- let hard_float_reg = hard_float_reg_gen Float
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- let hard_float32_reg = hard_float_reg_gen Float32
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+ let hard_int_reg = hard_reg_gen Int
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+ let hard_float_reg = hard_reg_gen Float
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+ let hard_float32_reg = hard_reg_gen Float32
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let all_phys_regs =
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Array. concat [hard_int_reg; hard_float_reg; hard_float32_reg; ]
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