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lines changed Original file line number Diff line number Diff line change @@ -140,10 +140,6 @@ let register_name ty r =
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| Float | Float32 | Vec128 | Valx2 ->
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float_reg_name.(r - first_available_register.(1 ))
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- (* Pack registers starting at %rax so as to reduce the number of REX
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- prefixes and thus improve code density *)
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- let rotate_registers = false
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-
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(* Representation of hard registers by pseudo-registers *)
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let hard_int_reg =
Original file line number Diff line number Diff line change @@ -131,9 +131,6 @@ let register_name ty r =
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(* CR mslater: (SIMD) arm64 *)
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fatal_error " arm64: got valx2 register"
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- (* CR gyorsh for xclerc: [rotate_registers] used in [coloring] on Mach,
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- but not in IRC on CFG. Are we dropping an optimization here? *)
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- let rotate_registers = true
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(* Representation of hard registers by pseudo-registers *)
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Original file line number Diff line number Diff line change @@ -26,7 +26,6 @@ val first_available_register: int array
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val register_name : Cmm .machtype_component -> int -> string
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val phys_reg : Cmm .machtype_component -> int -> Reg .t
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val gc_regs_offset : Reg .t -> int
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- val rotate_registers : bool
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val precolored_regs : unit -> Reg.Set .t
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(* The number of stack slot classes may differ from the number of register classes.
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