powerpc support (#22)

README.md

@@ -6,7 +6,7 @@
 Detect CPU ISA features with single-file
 
 <table>
-<tr><td>CPU</td><td>&#9989; x86, x86-64<br/>&#9989; arm, aarch64<br/>&#9989; mips<br/>&#9989; risc-v</td><td rowspan=3>
+<tr><td>CPU</td><td>&#9989; x86, x86-64<br/>&#9989; arm, aarch64<br/>&#9989; mips<br/>&#9989; powerpc<br/>&#9989; risc-v</td><td rowspan=3>
 
 ```c
 #define RUAPU_IMPLEMENTATION
@@ -221,7 +221,7 @@ _`fma4` on zen1, ISA in hypervisor, etc._
 |arm|`edsp` `neon` `vfpv4`|
 |aarch64|`neon` `vfpv4` `cpuid` `asimdhp` `asimddp` `asimdfhm` `bf16` `i8mm` `sve` `sve2` `svebf16` `svei8mm` `svef32mm`|
 |mips|`msa`|
-|powerpc||
+|powerpc|`vsx`|
 |loongarch||
 |risc-v|`i` `m` `a` `f` `d` `c`|
 

main.c

@@ -68,6 +68,9 @@ int main()
 #elif __mips__
     PRINT_ISA_SUPPORT(msa)
 
+#elif __powerpc__
+    PRINT_ISA_SUPPORT(vsx)
+
 #elif __riscv
     PRINT_ISA_SUPPORT(i)
     PRINT_ISA_SUPPORT(m)

ruapu.h

@@ -138,6 +138,8 @@ static int ruapu_detect_isa(ruapu_some_inst some_inst)
 #define RUAPU_INSTCODE(isa, ...) static void ruapu_some_##isa() { asm volatile(".byte " #__VA_ARGS__ : : : ); }
 #elif __aarch64__ || __arm__ || __mips__ || __riscv
 #define RUAPU_INSTCODE(isa, ...) static void ruapu_some_##isa() { asm volatile(".word " #__VA_ARGS__ : : : ); }
+#elif __powerpc__
+#define RUAPU_INSTCODE(isa, ...) static void ruapu_some_##isa() { asm volatile(".long " #__VA_ARGS__ : : : ); }
 #endif
 
 #else // defined _WIN32 || defined __ANDROID__ || defined __linux__ || defined __APPLE__
@@ -218,6 +220,9 @@ RUAPU_INSTCODE(vfpv4, 0xf3b60600) // vcvt.f16.f32 d0,q0
 #elif __mips__
 RUAPU_INSTCODE(msa, 0x7900001b) // fmadd.w $w0,$w0,$w0
 
+#elif __powerpc__
+RUAPU_INSTCODE(vsx, 0x104210c0) // vaddudm v2,v2,v2
+
 #elif __riscv
 RUAPU_INSTCODE(i, 0x00a50533) // add a0,a0,a0
 RUAPU_INSTCODE(m, 0x02a50533) // mul a0,a0,a0
@@ -287,6 +292,9 @@ RUAPU_ISAENTRY(vfpv4)
 #elif __mips__
 RUAPU_ISAENTRY(msa)
 
+#elif __powerpc__
+RUAPU_ISAENTRY(vsx)
+
 #elif __riscv
 RUAPU_ISAENTRY(i)
 RUAPU_ISAENTRY(m)