[pattgen,dv] Start to tidy up cnt_rollover

hw/ip/pattgen/data/pattgen_testplan.hjson

@@ -55,25 +55,30 @@
     {
       name: cnt_rollover
       desc: '''
-            Checking ip operation with random counter values
+            Check that the IP works correctly with a range of counter values.
 
             Stimulus:
-              - Program the pre-divider and size registers to unconstraint random values
-              - Program the clk_cnt, bit_cnt and rep_cnt to values less than but close to
-                predivider and size registers, so that counting would take a reasonable
-                number of clock cycles
-              - include programming for corner cases
-                repeat programming a random number of times
-              - Start and stop channels quickly
-              - Clear interrupts quickly
+
+              When picking a random configuration for a channel, this testpoint wants to see a large
+              range of values for prediv (cycles per bit), len (number of bits in the message) and
+              reps (number of pattern repetitions).
+
+              To avoid the test taking a very long time, the product of the three values can be
+              constrained with a bound.
+
+              To check for edge cases, the random values described above should be weighted to
+              sample the corners more often.
 
             Checking:
-              - Include functional cover point that rollover value is reached and counter is re-enabled:
-              - Ensure patterns are correctly generated
-              - Ensure interrupts are robust asserted and cleared (e.g. at the high data rate)
+
+              - Use the standard monitor/scoreboard to check that the generated patterns are as
+                expected.
+
+              - Add a functional cover point requiring that the rollover value is reached and then
+                the counter is re-enabled.
             '''
       stage: V2
-      tests: ["cnt_rollover"]
+      tests: ["pattgen_cnt_rollover"]
     }
     {
       name: error

hw/ip/pattgen/dv/env/pattgen_env_cfg.sv

@@ -3,33 +3,39 @@
 // SPDX-License-Identifier: Apache-2.0
 
 class pattgen_env_cfg extends cip_base_env_cfg #(.RAL_T(pattgen_reg_block));
-  // drained time of phase_ready_to_end
+  // Drain time of phase_ready_to_end
   uint ok_to_end_delay_ns = 8000;
 
-  // pattgen_agent_cfg
+  // Configuration for the pattgen agent (stored in the environment as m_pattgen_agent).
   rand pattgen_agent_cfg m_pattgen_agent_cfg;
 
-  // seq cfg
+  // Configuration that applies to the virtual sequences that run in the environment
   pattgen_seq_cfg seq_cfg;
 
+  extern function new (string name="");
+
+  // Implements a function from dv_base_env_cfg. The base class version creates RAL models. This
+  // extension uses the type of the RAL model to set num_interrupts.
+  extern virtual function void initialize(bit [TL_AW-1:0] csr_base_addr = '1);
+
   `uvm_object_utils_begin(pattgen_env_cfg)
     `uvm_field_object(m_pattgen_agent_cfg, UVM_DEFAULT)
   `uvm_object_utils_end
+endclass
+
+function pattgen_env_cfg::new (string name="");
+  super.new(name);
 
-  `uvm_object_new
+  list_of_alerts = pattgen_env_pkg::LIST_OF_ALERTS;
 
-  virtual function void initialize(bit [TL_AW-1:0] csr_base_addr = '1);
-    list_of_alerts = pattgen_env_pkg::LIST_OF_ALERTS;
-    super.initialize(csr_base_addr);
+  m_pattgen_agent_cfg = pattgen_agent_cfg::type_id::create("m_pattgen_agent_cfg");
+  m_pattgen_agent_cfg.if_mode = Device; // setup agent in Device mode
 
-    // create pattgen_agent_cfg
-    m_pattgen_agent_cfg = pattgen_agent_cfg::type_id::create("m_pattgen_agent_cfg");
-    m_pattgen_agent_cfg.if_mode = Device; // setup agent in Device mode
+  seq_cfg = pattgen_seq_cfg::type_id::create("seq_cfg");
+endfunction
 
-    // create the seq_cfg
-    seq_cfg = pattgen_seq_cfg::type_id::create("seq_cfg");
+function void pattgen_env_cfg::initialize(bit [TL_AW-1:0] csr_base_addr = '1);
+  super.initialize(csr_base_addr);
 
-    // set num_interrupts & num_alerts
-    num_interrupts = ral.intr_state.get_n_used_bits();
-  endfunction
-endclass : pattgen_env_cfg
+  num_interrupts = ral.intr_state.get_n_used_bits();
+endfunction

hw/ip/pattgen/dv/env/pattgen_env_pkg.sv

@@ -27,13 +27,6 @@ package pattgen_env_pkg;
     NumPattgenIntr = 2
   } pattgen_intr_e;
 
-  typedef enum bit[1:0] {
-    NoChannels   = 2'b00,
-    Channel0     = 2'b01,
-    Channel1     = 2'b10,
-    AllChannels  = 2'b11
-  } channel_select_e;
-
   typedef enum bit {
     Enable      = 1'b1,
     Disable     = 1'b0

hw/ip/pattgen/dv/env/pattgen_seq_cfg.sv

@@ -16,10 +16,6 @@ class pattgen_seq_cfg extends uvm_object;
   uint pattgen_min_num_runs          = 1;
   uint pattgen_max_num_runs          = 5;
 
-  // knobs for pattgen channel
-  uint pattgen_min_dly               = 0;
-  uint pattgen_max_dly               = 5;
-
   // see the specification document, the effective values of prediv, len, and reps
   // are incremented from the coresponding register values
 
@@ -30,11 +26,9 @@ class pattgen_seq_cfg extends uvm_object;
   uint pattgen_min_reps              = RepsMinValue;
   uint pattgen_max_reps              = RepsMaxValue;
 
-  uint pattgen_low_polarity_pct      = 50;  // in percentage
   uint pattgen_sync_channels_pct     = 30;  // in percentage
 
   // for error_vseq
-  bit  error_injected_enb            = 1'b0;
   uint error_injected_pct            = 10;  // in percentage
   uint data_top_pct                  = 10;
   uint data_bottom_pct               = 80;