Skip to content

[MLIR][MemRef] Add alloca support for erase_dead_alloc_and_stores #142131

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
wants to merge 3 commits into
base: main
Choose a base branch
from
+30 −4
Open

[MLIR][MemRef] Add alloca support for erase_dead_alloc_and_stores #142131

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
3e9990d
[MLIR][MemRef] Add `alloca` support for `erase_dead_alloc_and_stores`
Lallapallooza May 30, 2025
ecb4559
[MLIR][MemRef] Add `alloca` support for `erase_dead_alloc_and_stores`
Lallapallooza May 30, 2025
7d25349
Merge branch 'main' into memref_erase_add_alloca_support
Lallapallooza Jun 18, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion mlir/include/mlir/Dialect/MemRef/TransformOps/MemRefTransformOps.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -245,7 +245,7 @@ def MemRefEraseDeadAllocAndStoresOp
]> {
let description = [{
This applies memory optimization on memref. In particular it does store to
load forwarding, dead store elimination and dead alloc elimination.
load forwarding, dead store elimination and dead alloc/alloca elimination.

#### Return modes

Expand Down
8 changes: 5 additions & 3 deletions mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -156,13 +156,15 @@ static bool resultIsNotRead(Operation *op, std::vector<Operation *> &uses) {

void eraseDeadAllocAndStores(RewriterBase &rewriter, Operation *parentOp) {
std::vector<Operation *> opToErase;
parentOp->walk([&](memref::AllocOp op) {
parentOp->walk([&](Operation *op) {
std::vector<Operation *> candidates;
if (resultIsNotRead(op, candidates)) {
if (isa<memref::AllocOp, memref::AllocaOp>(op) &&
resultIsNotRead(op, candidates)) {
llvm::append_range(opToErase, candidates);
opToErase.push_back(op.getOperation());
opToErase.push_back(op);
}
});

for (Operation *op : opToErase)
rewriter.eraseOp(op);
}
Expand Down
24 changes: 24 additions & 0 deletions mlir/test/Dialect/MemRef/transform-ops.mlir
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -327,6 +327,30 @@ module attributes {transform.with_named_sequence} {
}
}

// -----

// CHECK-LABEL: func.func @dead_alloca
func.func @dead_alloca() {
// CHECK-NOT: %{{.+}} = memref.alloca
%0 = memref.alloca() : memref<8x64xf32, 3>
%1 = memref.subview %0[0, 0] [8, 4] [1, 1] : memref<8x64xf32, 3> to
memref<8x4xf32, affine_map<(d0, d1) -> (d0 * 64 + d1)>, 3>
%c0 = arith.constant 0 : index
%cst_0 = arith.constant dense<0.000000e+00> : vector<1x4xf32>
vector.transfer_write %cst_0, %1[%c0, %c0] {in_bounds = [true, true]} :
vector<1x4xf32>, memref<8x4xf32, affine_map<(d0, d1) -> (d0 * 64 + d1)>, 3>
return
}

module attributes {transform.with_named_sequence} {
transform.named_sequence @__transform_main(%arg1: !transform.any_op {transform.readonly}) {
%0 = transform.structured.match ops{["func.func"]} in %arg1 : (!transform.any_op) -> !transform.any_op
transform.memref.erase_dead_alloc_and_stores %0 : (!transform.any_op) -> ()
transform.yield
}
}


// -----

// CHECK-LABEL: @store_to_load
Expand Down
Loading