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Control-Unit-Simulation-VHDL-

Microprocessor control unit simulation implemented in VHDL (Quartus).

This project simulates a simplified model of a Motorola CPU08 central processor unit controlled by input opcode where:

  • completecontrolunit : Contains assembled control unit .bdf and Quartus project

  • adder, controlunit, multitwo: Contains the individual components

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Microprocessor control unit simulation implemented in VHDL.

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