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Unit tests

verilog: add a beautiful regex-based "parser" for Verilog module defi… #57

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verilog: add a beautiful regex-based "parser" for Verilog module defi…

verilog: add a beautiful regex-based "parser" for Verilog module defi… #57

Triggered via push May 22, 2024 13:19
@kivikakkkivikakk
pushed 9616d00
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Status Success
Total duration 43s
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unit-tests.yml

on: push
unit-tests
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