Generate for KiCAD 7

jvestman · Sep 23, 2023 · 594bae5 · 594bae5
1 parent 5ae65b6
commit 594bae5
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Showing 13 changed files with 62 additions and 22 deletions.
diff --git a/arduino_generator.py b/arduino_generator.py
@@ -153,7 +153,7 @@ def generate_arduino_nano_v3_board_footprint():
     """Generate Arduino Nano V3 board layout footprint"""
     return '''
 BOARD = Part('MCU_Module', 'Arduino_Nano_v3.x', footprint='Module:Arduino_Nano')
-BOARD['~RESET'] += U1['~{RESET}/PC6']
+BOARD['~{RESET}'] += U1['~{RESET}/PC6']
 BOARD['+5V'] += Net.fetch('+5V')
 BOARD['3V3'] += Net.fetch('+3V3')
 BOARD['GND'] += Net.fetch('GND')

diff --git a/generator.py b/generator.py
@@ -187,6 +187,8 @@ def generate(args):
     import_statements.add('from skidl import generate_netlist')
     import_statements.add('from skidl import Net')
     import_statements.add('from skidl import Part')
+    import_statements.add('from skidl import set_default_tool')
+    import_statements.add('from skidl import KICAD7')
 
     import_code = "\n".join(import_statements)
 
@@ -221,6 +223,8 @@ def generate(args):
 
 {import_code}
 
+set_default_tool(KICAD7)
+
 """ + reqcode + code
 
 
@@ -267,7 +271,7 @@ def connect_power_network(args):
         requirements.add(generate_device)
         requirements.add(generate_d)
         import_statements.add("from skidl import show")
-        components = ['REGULATOR[\'VI\']', 'D("MBR0520LT")']
+        components = ['REGULATOR[\'VI\']', 'D("MBR0520LT", footprint=\'Diode_SMD:D_SOD-123\')[\'A,K\']']
     elif args.get('usb_connector', False) != 'No USB connector':
         components = ['Net.fetch(\'+VBus\')']
     else:

diff --git a/passives_generator.py b/passives_generator.py
@@ -56,9 +56,9 @@ def generate_device(args):
     """Generate part lookup function"""
 
     return f"""
-def Device(library, name, value=""):
+def Device(library, name, value="", footprint=None):
     \"\"\"Make part lookup and return the part with footprint set\"\"\"
-    footprint = show(library, name).F2
+    footprint = footprint or show(library, name).F2
     if not value:
         value=name
     return Part(library, name, value=value, footprint=footprint)
@@ -68,7 +68,7 @@ def Device(library, name, value=""):
 def generate_d(args):
     """Generate part lookup function"""
     return f"""
-def D(name,value=""):
+def D(name,value="",footprint=None):
     \"\"\"Creates diode\"\"\"
-    return Device('Diode', name, value=value)
+    return Device('Diode', name, value=value, footprint=footprint)
 """
diff --git a/tests/arduino-nano.py b/tests/arduino-nano.py
@@ -29,24 +29,28 @@
 from skidl import generate_netlist
 from skidl import Net
 from skidl import Part
+from skidl import set_default_tool
+from skidl import KICAD7
+
+set_default_tool(KICAD7)
 
 
 def R(value):
     """Creates default resistor footprint"""
     return Part('Device', 'R', value=value, footprint='Resistor_SMD:R_1206_3216Metric')
 
 
-def Device(library, name, value=""):
+def Device(library, name, value="", footprint=None):
     """Make part lookup and return the part with footprint set"""
-    footprint = show(library, name).F2
+    footprint = footprint or show(library, name).F2
     if not value:
         value=name
     return Part(library, name, value=value, footprint=footprint)
 
 
-def D(name,value=""):
+def D(name,value="",footprint=None):
     """Creates diode"""
-    return Device('Diode', name, value=value)
+    return Device('Diode', name, value=value, footprint=footprint)
 
 
 def C(value):
@@ -106,7 +110,7 @@ def C(value):
 USBMICRO['D-'] += Net.fetch('USBD-')
 USBMICRO['D+'] += Net.fetch('USBD+')
 
-REGULATOR['VI'] & D("MBR0520LT") & FUSE
+REGULATOR['VI'] & D("MBR0520LT", footprint='Diode_SMD:D_SOD-123')['A,K'] & FUSE
 
 FTDI230 = Part('Interface_USB', 'FT231XS', footprint="Package_SO:SSOP-20_3.9x8.7mm_P0.635mm")
 FTDI230['VCC'] += Net.fetch('+5V')
@@ -116,12 +120,12 @@ def C(value):
 FTDI230['3V3OUT'] += Net.fetch('+3V3')
 FTDI230['USBDM'] += Net.fetch('USBD-')
 FTDI230['USBDP'] += Net.fetch('USBD+')
-FTDI230['~DTR'] += Net.fetch('DTR')
-FTDI230['~RTS'] += Net.fetch('RTS')
+FTDI230['~{DTR}'] += Net.fetch('DTR')
+FTDI230['~{RTS}'] += Net.fetch('RTS')
 Net.fetch('GND') & C('100nF') & FTDI230['3V3OUT']
 
 BOARD = Part('MCU_Module', 'Arduino_Nano_v3.x', footprint='Module:Arduino_Nano')
-BOARD['~RESET'] += U1['~{RESET}/PC6']
+BOARD['~{RESET}'] += U1['~{RESET}/PC6']
 BOARD['+5V'] += Net.fetch('+5V')
 BOARD['3V3'] += Net.fetch('+3V3')
 BOARD['GND'] += Net.fetch('GND')

diff --git a/tests/basic-esp12.py b/tests/basic-esp12.py
@@ -29,6 +29,10 @@
 from skidl import generate_netlist
 from skidl import Net
 from skidl import Part
+from skidl import set_default_tool
+from skidl import KICAD7
+
+set_default_tool(KICAD7)
 
 
 def R(value):

diff --git a/tests/empty.py b/tests/empty.py
@@ -28,6 +28,10 @@
 from skidl import generate_netlist
 from skidl import Net
 from skidl import Part
+from skidl import set_default_tool
+from skidl import KICAD7
+
+set_default_tool(KICAD7)
 
 
 generate_netlist()
diff --git a/tests/esp-12-mcp73831-ap2112k-cp2104-feather.py b/tests/esp-12-mcp73831-ap2112k-cp2104-feather.py
@@ -31,6 +31,10 @@
 from skidl import generate_netlist
 from skidl import Net
 from skidl import Part
+from skidl import set_default_tool
+from skidl import KICAD7
+
+set_default_tool(KICAD7)
 
 
 def subcircuit_label(name):
@@ -48,17 +52,17 @@ def C(value):
     return Part('Device', 'C', value=value, footprint='Capacitor_SMD:C_1206_3216Metric')
 
 
-def Device(library, name, value=""):
+def Device(library, name, value="", footprint=None):
     """Make part lookup and return the part with footprint set"""
-    footprint = show(library, name).F2
+    footprint = footprint or show(library, name).F2
     if not value:
         value=name
     return Part(library, name, value=value, footprint=footprint)
 
 
-def D(name,value=""):
+def D(name,value="",footprint=None):
     """Creates diode"""
-    return Device('Diode', name, value=value)
+    return Device('Diode', name, value=value, footprint=footprint)
 
 
 def connect_parts(a, b):
@@ -147,7 +151,7 @@ def generate_mcp73831():
 USBMICRO['D-'] += Net.fetch('USBD-')
 USBMICRO['D+'] += Net.fetch('USBD+')
 
-REGULATOR['VI'] & D("MBR0520LT") & BATTERY
+REGULATOR['VI'] & D("MBR0520LT", footprint='Diode_SMD:D_SOD-123')['A,K'] & BATTERY
 
 
 @subcircuit

diff --git a/tests/esp12-ftdi-header.py b/tests/esp12-ftdi-header.py
@@ -29,6 +29,10 @@
 from skidl import generate_netlist
 from skidl import Net
 from skidl import Part
+from skidl import set_default_tool
+from skidl import KICAD7
+
+set_default_tool(KICAD7)
 
 
 def R(value):

diff --git a/tests/esp12-reset-flash.py b/tests/esp12-reset-flash.py
@@ -29,6 +29,10 @@
 from skidl import generate_netlist
 from skidl import Net
 from skidl import Part
+from skidl import set_default_tool
+from skidl import KICAD7
+
+set_default_tool(KICAD7)
 
 
 def R(value):

diff --git a/tests/esp12.py b/tests/esp12.py
@@ -29,6 +29,10 @@
 from skidl import generate_netlist
 from skidl import Net
 from skidl import Part
+from skidl import set_default_tool
+from skidl import KICAD7
+
+set_default_tool(KICAD7)
 
 
 def R(value):

diff --git a/tests/wemos_d1_mini_18b20u.py b/tests/wemos_d1_mini_18b20u.py
@@ -29,6 +29,10 @@
 from skidl import generate_netlist
 from skidl import Net
 from skidl import Part
+from skidl import set_default_tool
+from skidl import KICAD7
+
+set_default_tool(KICAD7)
 
 
 def subcircuit_label(name):

diff --git a/tests/zero.py b/tests/zero.py
@@ -28,6 +28,10 @@
 from skidl import generate_netlist
 from skidl import Net
 from skidl import Part
+from skidl import set_default_tool
+from skidl import KICAD7
+
+set_default_tool(KICAD7)
 
 
 generate_netlist()
diff --git a/usb_uart_generator.py b/usb_uart_generator.py
@@ -42,8 +42,8 @@ def generate_ftdi230(args):
 FTDI230['3V3OUT'] += Net.fetch('+3V3')
 FTDI230['USBDM'] += Net.fetch('USBD-')
 FTDI230['USBDP'] += Net.fetch('USBD+')
-FTDI230['~DTR'] += Net.fetch('DTR')
-FTDI230['~RTS'] += Net.fetch('RTS')
+FTDI230['~{{DTR}}'] += Net.fetch('DTR')
+FTDI230['~{{RTS}}'] += Net.fetch('RTS')
 Net.fetch('GND') & C('100nF') & FTDI230['3V3OUT']
 '''.format(**args)
 
@@ -60,7 +60,7 @@ def generate_ftdi232rl(args):
 FTDI230['3V3OUT'] += Net.fetch('+3V3')
 FTDI230['USBD-'] += Net.fetch('USBD-')
 FTDI230['USBD+'] += Net.fetch('USBD+')
-FTDI230['~DTR'] += Net.fetch('DTR')
+FTDI230['~{{DTR}}'] += Net.fetch('DTR')
 FTDI230['TEST'] += Net.fetch('GND')
 C_3V3 = Part('Device', 'C', value='100nF', footprint='{capacitor_footprint}')
 Net.fetch('GND') & C_3V3 & FTDI230['3V3OUT']