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RISC-V: Support MASK_LEN_{LOAD_LANES,STORE_LANES}
This patch allow us auto-vectorize this following case: void __attribute__ ((noinline, noclone)) \ NAME##_8 (OUTTYPE *__restrict dest, INTYPE *__restrict src, \ MASKTYPE *__restrict cond, intptr_t n) \ { \ for (intptr_t i = 0; i < n; ++i) \ if (cond[i]) \ dest[i] = (src[i * 8] + src[i * 8 + 1] + src[i * 8 + 2] \ + src[i * 8 + 3] + src[i * 8 + 4] + src[i * 8 + 5] \ + src[i * 8 + 6] + src[i * 8 + 7]); \ } TEST_LOOP (NAME##_f32, OUTTYPE, INTYPE, int32_t) \ TEST2 (NAME##_i32, OUTTYPE, int32_t) \ TEST1 (NAME##_i32, int32_t) \ TEST (test) ASM: test_i32_i32_f32_8: ble a3,zero,.L5 .L3: vsetvli a4,a3,e8,mf4,ta,ma vle32.v v0,0(a2) vsetvli a5,zero,e32,m1,ta,ma vmsne.vi v0,v0,0 vsetvli zero,a4,e32,m1,ta,ma vlseg8e32.v v8,(a1),v0.t vsetvli a5,zero,e32,m1,ta,ma slli a6,a4,2 vadd.vv v1,v9,v8 slli a7,a4,5 vadd.vv v1,v1,v10 sub a3,a3,a4 vadd.vv v1,v1,v11 vadd.vv v1,v1,v12 vadd.vv v1,v1,v13 vadd.vv v1,v1,v14 vadd.vv v1,v1,v15 vsetvli zero,a4,e32,m1,ta,ma vse32.v v1,0(a0),v0.t add a2,a2,a6 add a1,a1,a7 add a0,a0,a6 bne a3,zero,.L3 .L5: ret gcc/ChangeLog: * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>): New pattern. (vec_mask_len_store_lanes<mode><vsingle>): Ditto. * config/riscv/riscv-protos.h (expand_lanes_load_store): New function. * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode. (expand_lanes_load_store): New function. * config/riscv/vector-iterators.md: New iterator. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/gather-scatter/strided_load-2.c: Adapt test. * gcc.target/riscv/rvv/autovec/partial/slp-1.c: Ditto. * gcc.target/riscv/rvv/autovec/partial/slp-16.c: Ditto. * gcc.target/riscv/rvv/autovec/partial/slp-17.c: Ditto. * gcc.target/riscv/rvv/autovec/partial/slp-18.c: Ditto. * gcc.target/riscv/rvv/autovec/partial/slp-19.c: Ditto. * gcc.target/riscv/rvv/autovec/partial/slp-2.c: Ditto. * gcc.target/riscv/rvv/autovec/partial/slp-3.c: Ditto. * gcc.target/riscv/rvv/autovec/partial/slp-4.c: Ditto. * gcc.target/riscv/rvv/autovec/partial/slp-5.c: Ditto. * gcc.target/riscv/rvv/autovec/partial/slp-6.c: Ditto. * gcc.target/riscv/rvv/rvv.exp: Add lanes tests. * gcc.target/riscv/rvv/autovec/struct/mask_struct_load-1.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_load-2.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_load-3.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_load-4.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_load-5.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_load-6.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_load-7.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_load_run-1.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_load_run-2.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_load_run-3.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_load_run-4.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_load_run-5.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_load_run-6.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_load_run-7.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_store-1.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_store-2.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_store-3.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_store-4.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_store-5.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_store-6.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_store-7.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_store_run-1.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_store_run-2.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_store_run-3.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_store_run-4.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_store_run-5.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_store_run-6.c: New test. * gcc.target/riscv/rvv/autovec/struct/mask_struct_store_run-7.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect-1.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect-10.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect-11.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect-12.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect-13.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect-14.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect-15.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect-16.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect-17.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect-18.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect-2.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect-3.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect-4.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect-5.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect-6.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect-7.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect-8.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect-9.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect_run-1.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect_run-10.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect_run-11.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect_run-12.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect_run-13.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect_run-14.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect_run-15.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect_run-16.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect_run-17.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect_run-18.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect_run-2.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect_run-3.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect_run-4.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect_run-5.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect_run-6.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect_run-7.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect_run-8.c: New test. * gcc.target/riscv/rvv/autovec/struct/struct_vect_run-9.c: New test.
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42 changes: 42 additions & 0 deletions
42
gcc/testsuite/gcc.target/riscv/rvv/autovec/struct/mask_struct_load-1.c
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Original file line number | Diff line number | Diff line change |
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/* { dg-do compile } */ | ||
/* { dg-additional-options "-std=c99 -march=rv32gcv_zvfh -mabi=ilp32d --param=riscv-autovec-preference=scalable -fno-vect-cost-model" } */ | ||
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#include <stdint-gcc.h> | ||
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#define TEST_LOOP(NAME, OUTTYPE, INTYPE, MASKTYPE) \ | ||
void __attribute__ ((noinline, noclone)) \ | ||
NAME##_2 (OUTTYPE *__restrict dest, INTYPE *__restrict src, \ | ||
MASKTYPE *__restrict cond, intptr_t n) \ | ||
{ \ | ||
for (intptr_t i = 0; i < n; ++i) \ | ||
if (cond[i]) \ | ||
dest[i] = src[i * 2] + src[i * 2 + 1]; \ | ||
} | ||
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#define TEST2(NAME, OUTTYPE, INTYPE) \ | ||
TEST_LOOP (NAME##_i8, OUTTYPE, INTYPE, int8_t) \ | ||
TEST_LOOP (NAME##_i16, OUTTYPE, INTYPE, uint16_t) \ | ||
TEST_LOOP (NAME##_f32, OUTTYPE, INTYPE, float) \ | ||
TEST_LOOP (NAME##_f64, OUTTYPE, INTYPE, double) | ||
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#define TEST1(NAME, OUTTYPE) \ | ||
TEST2 (NAME##_i8, OUTTYPE, int8_t) \ | ||
TEST2 (NAME##_i16, OUTTYPE, uint16_t) \ | ||
TEST2 (NAME##_i32, OUTTYPE, int32_t) \ | ||
TEST2 (NAME##_i64, OUTTYPE, uint64_t) | ||
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#define TEST(NAME) \ | ||
TEST1 (NAME##_i8, int8_t) \ | ||
TEST1 (NAME##_i16, uint16_t) \ | ||
TEST1 (NAME##_i32, int32_t) \ | ||
TEST1 (NAME##_i64, uint64_t) \ | ||
TEST2 (NAME##_f16_f16, _Float16, _Float16) \ | ||
TEST2 (NAME##_f32_f32, float, float) \ | ||
TEST2 (NAME##_f64_f64, double, double) | ||
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TEST (test) | ||
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/* { dg-final { scan-assembler-times {vlseg2e8\.v\s+v[0-9]+,\s*\([a-x0-9]+\),\s*v0.t} 16 } } */ | ||
/* { dg-final { scan-assembler-times {vlseg2e16\.v\s+v[0-9]+,\s*\([a-x0-9]+\),\s*v0.t} 20 } } */ | ||
/* { dg-final { scan-assembler-times {vlseg2e32\.v\s+v[0-9]+,\s*\([a-x0-9]+\),\s*v0.t} 20 } } */ | ||
/* { dg-final { scan-assembler-times {vlseg2e64\.v\s+v[0-9]+,\s*\([a-x0-9]+\),\s*v0.t} 20 } } */ |
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