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[Encode] Clean up master encode issue of Coverity
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Clean up master encode issue of Coverity.
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@Bossonor @intel-mediadev
Bossonor authored and intel-mediadev committed Sep 11, 2023
1 parent 494fcf4 commit b2e90de
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Showing 15 changed files with 58 additions and 58 deletions.
20 changes: 10 additions & 10 deletions media_driver/agnostic/common/codec/hal/codechal_encode_vp8.h
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Expand Up @@ -1410,33 +1410,33 @@ class CodechalEncodeVp8 : public CodechalEncoderState
uint16_t m_usRepakPassIterVal = 0; // n th pass when Repak is executed

// MB Enc
MHW_KERNEL_STATE m_mbEncKernelStates[CODECHAL_ENCODE_VP8_MBENC_IDX_NUM];
MHW_KERNEL_STATE m_mbEncKernelStates[CODECHAL_ENCODE_VP8_MBENC_IDX_NUM] = {};
uint32_t m_numMbEncEncKrnStates = 0;
uint32_t m_mbEncIFrameDshSize = 0;
struct CodechalBindingTableVp8Mbenc m_mbEncBindingTable;
struct CodechalBindingTableVp8Mbenc m_mbEncBindingTable = {};
uint32_t m_mbEncBlockBasedSkipEn = 0;
MOS_RESOURCE m_resRefMbCountSurface;
MOS_RESOURCE m_resRefMbCountSurface = {};
MOS_SURFACE m_mbModeCostLumaBuffer = {};
MOS_SURFACE m_blockModeCostBuffer = {};
MOS_RESOURCE m_chromaReconBuffer; // for fixed function VP8
MOS_RESOURCE m_chromaReconBuffer = {}; // for fixed function VP8
MOS_SURFACE m_perMbQuantDataBuffer = {};
MOS_RESOURCE m_resPredMvDataSurface;
MOS_RESOURCE m_resHistogram;
MOS_RESOURCE m_resModeCostUpdateSurface;
MOS_RESOURCE m_resPredMvDataSurface = {};
MOS_RESOURCE m_resHistogram = {};
MOS_RESOURCE m_resModeCostUpdateSurface = {};
// MBRC = 1: internal segment map (sInSegmentMapSurface) is provided from BRC update kernel
// MBRC = 0: external segment map (sMbSegmentMapSurface) is provided from the app, ignore internal segment map
MOS_SURFACE m_inSegmentMapSurface = {};
MOS_SURFACE m_mbSegmentMapSurface = {}; // var of type MOS_SURFACE of Mb segment map surface

// MPU & TPU Buffers
struct CodechalVp8MpuTpuBuffers m_mpuTpuBuffers;
struct CodechalVp8MpuTpuBuffers m_mpuTpuBuffers = {};

// TPU
MHW_KERNEL_STATE m_tpuKernelState;
MHW_KERNEL_STATE m_tpuKernelState = {};
struct CodechalBindingTableVp8Tpu m_tpuBindingTable = {};

// MPU
MHW_KERNEL_STATE m_mpuKernelState;
MHW_KERNEL_STATE m_mpuKernelState = {};
struct CodechalBindingTableVp8Mpu m_mpuBindingTable = {};

// VME Scratch Buffers
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6 changes: 3 additions & 3 deletions media_driver/agnostic/common/codec/hal/codechal_encoder_base.h
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Expand Up @@ -1533,11 +1533,11 @@ class CodechalEncoderState : public Codechal
uint32_t m_mvDataSize = 0; //!< MV data size
uint32_t m_mvBottomFieldOffset = 0; //!< MV data offset frame/TopField - zero, BottomField - nonzero
MOS_RESOURCE m_resDistortionBuffer = {}; //!< MBEnc Distortion Buffer
MOS_RESOURCE m_resMadDataBuffer[CODECHAL_ENCODE_MAX_NUM_MAD_BUFFERS]; //!< Buffers to store Mean of Absolute Differences
MOS_RESOURCE m_resMadDataBuffer[CODECHAL_ENCODE_MAX_NUM_MAD_BUFFERS] = {}; //!< Buffers to store Mean of Absolute Differences
bool m_madEnabled = false; //!< Mad enabled flag

bool m_arbitraryNumMbsInSlice = false; //!< Flag to indicate if the sliceMapSurface needs to be programmed or not
MOS_SURFACE m_sliceMapSurface[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM]; //!< Slice map surface
MOS_SURFACE m_sliceMapSurface[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM] = {}; //!< Slice map surface
uint32_t m_sliceMapBottomFieldOffset = 0; //!< Slice map bottom field offset

// VDENC and PAK Data Buffer
Expand All @@ -1549,7 +1549,7 @@ class CodechalEncoderState : public Codechal
PMOS_RESOURCE m_resVdencModeTimerBuffer = nullptr; //!< Resource of Vdenc mode timer buffer

// VDEnc StreamIn Buffer
MOS_RESOURCE m_resVdencStreamInBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM]; //!< Resources of Vdenc stream in buffer
MOS_RESOURCE m_resVdencStreamInBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM] = {}; //!< Resources of Vdenc stream in buffer

// Maximum number of slices allowed by video spec
uint32_t m_maxNumSlicesAllowed = 0; //!< Max number of slices allowed
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24 changes: 12 additions & 12 deletions media_driver/agnostic/common/codec/hal/codechal_vdenc_hevc.h
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Expand Up @@ -222,23 +222,23 @@ class CodechalVdencHevcState : public CodechalEncodeHevcBase
uint32_t m_currGopIFramePOC = -1; //!< PoC for I frame in current GoP

// BRC
HevcVdencBrcBuffers m_vdencBrcBuffers; //!< VDEnc Brc buffers
MOS_RESOURCE m_dataFromPicsBuffer; //!< Data Buffer of Current and Reference Pictures for Weighted Prediction
MOS_RESOURCE m_vdencDeltaQpBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM]; //!< VDEnc delta QP buffer
MOS_RESOURCE m_vdencOutputROIStreaminBuffer; //!< VDEnc Output ROI Streamin Buffer
MOS_RESOURCE m_vdencBrcUpdateDmemBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][CODECHAL_VDENC_BRC_NUM_OF_PASSES_FOR_TILE_REPLAY]; //!< VDEnc BrcUpdate DMEM buffer
MOS_RESOURCE m_vdencBrcInitDmemBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM]; //!< VDEnc BrcInit DMEM buffer
MOS_RESOURCE m_vdencBrcConstDataBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM]; //!< VDEnc brc constant data buffer
MOS_RESOURCE m_vdencBrcHistoryBuffer; //!< VDEnc brc history buffer
MOS_RESOURCE m_vdencReadBatchBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][CODECHAL_VDENC_BRC_NUM_OF_PASSES]; //!< VDEnc read batch buffer
MOS_RESOURCE m_vdencGroup3BatchBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][CODECHAL_VDENC_BRC_NUM_OF_PASSES]; //!< VDEnc read batch buffer for Group3
MOS_RESOURCE m_vdencBrcDbgBuffer; //!< VDEnc brc debug buffer
HevcVdencBrcBuffers m_vdencBrcBuffers = {}; //!< VDEnc Brc buffers
MOS_RESOURCE m_dataFromPicsBuffer = {}; //!< Data Buffer of Current and Reference Pictures for Weighted Prediction
MOS_RESOURCE m_vdencDeltaQpBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM] = {}; //!< VDEnc delta QP buffer
MOS_RESOURCE m_vdencOutputROIStreaminBuffer = {}; //!< VDEnc Output ROI Streamin Buffer
MOS_RESOURCE m_vdencBrcUpdateDmemBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][CODECHAL_VDENC_BRC_NUM_OF_PASSES_FOR_TILE_REPLAY] = {}; //!< VDEnc BrcUpdate DMEM buffer
MOS_RESOURCE m_vdencBrcInitDmemBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM] = {}; //!< VDEnc BrcInit DMEM buffer
MOS_RESOURCE m_vdencBrcConstDataBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM] = {}; //!< VDEnc brc constant data buffer
MOS_RESOURCE m_vdencBrcHistoryBuffer = {}; //!< VDEnc brc history buffer
MOS_RESOURCE m_vdencReadBatchBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][CODECHAL_VDENC_BRC_NUM_OF_PASSES] = {}; //!< VDEnc read batch buffer
MOS_RESOURCE m_vdencGroup3BatchBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][CODECHAL_VDENC_BRC_NUM_OF_PASSES] = {}; //!< VDEnc read batch buffer for Group3
MOS_RESOURCE m_vdencBrcDbgBuffer = {}; //!< VDEnc brc debug buffer
uint32_t m_deltaQpRoiBufferSize = 0; //!< VDEnc DeltaQp for ROI buffer size
uint32_t m_brcRoiBufferSize = 0; //!< BRC ROI input buffer size
MHW_VDBOX_HUC_VIRTUAL_ADDR_PARAMS m_virtualAddrParams = {}; //!< BRC virtual address parameter

// Batch Buffer for VDEnc
MHW_BATCH_BUFFER m_vdenc2ndLevelBatchBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM]; //!< VDEnc 2nd level batch buffer
MHW_BATCH_BUFFER m_vdenc2ndLevelBatchBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM] = {}; //!< VDEnc 2nd level batch buffer
uint32_t m_vdenc2ndLevelBatchBufferSize[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM] = {0};
uint32_t m_vdencBatchBufferPerSliceVarSize[ENCODE_HEVC_VDENC_NUM_MAX_SLICES] = { 0 }; //!< VDEnc batch buffer slice size array
uint32_t m_1stPakInsertObjectCmdSize = 0; //!< Size of 1st PAK_INSERT_OBJ cmd
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4 changes: 2 additions & 2 deletions media_driver/agnostic/common/codec/hal/codechal_vdenc_vp9_base.h
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Expand Up @@ -1636,8 +1636,8 @@ class CodechalVdencVp9State : public CodechalEncoderState
PCODEC_VP9_ENCODE_PIC_PARAMS m_vp9PicParams = nullptr; //!< Pointer to picture parameters
PCODEC_VP9_ENCODE_SEGMENT_PARAMS m_vp9SegmentParams = nullptr; //!< Pointer to segment parameters

CODEC_PIC_ID m_picIdx[CODEC_VP9_NUM_REF_FRAMES];
PCODEC_REF_LIST m_refList[m_numUncompressedSurface];
CODEC_PIC_ID m_picIdx[CODEC_VP9_NUM_REF_FRAMES] = {};
PCODEC_REF_LIST m_refList[m_numUncompressedSurface] = {};
PCODECHAL_NAL_UNIT_PARAMS* m_nalUnitParams = nullptr;
uint32_t m_numNalUnit = 0;

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2 changes: 1 addition & 1 deletion media_driver/agnostic/gen12/codec/hal/codechal_encode_sw_scoreboard_mdf_g12.cpp
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Expand Up @@ -169,7 +169,7 @@ MOS_STATUS CodechalEncodeSwScoreboardMdfG12::SetupKernelArgs()
m_cmKrn->SetKernelArg(idx++, sizeof(SurfaceIndex), pSurfIndex);
if (m_lcuInfoSurface)
{
m_lcuInfoSurface->GetIndex(pSurfIndex);
CODECHAL_ENCODE_CHK_STATUS_RETURN(m_lcuInfoSurface->GetIndex(pSurfIndex));
}
m_cmKrn->SetKernelArg(idx++, sizeof(SurfaceIndex), pSurfIndex);

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4 changes: 2 additions & 2 deletions media_driver/agnostic/gen12/codec/hal/codechal_encode_wp_mdf_g12.cpp
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Expand Up @@ -226,10 +226,10 @@ MOS_STATUS CodechalEncodeWPMdfG12::SetupKernelArgs(uint8_t wpKrnIdx)
(uint8_t *)&curbe,
sizeof(curbe)));)

m_wpInputSurface[wpKrnIdx]->GetIndex(pSurfIndex);
CODECHAL_ENCODE_CHK_STATUS_RETURN(m_wpInputSurface[wpKrnIdx]->GetIndex(pSurfIndex));
CODECHAL_ENCODE_CHK_STATUS_RETURN(m_cmKrn[wpKrnIdx]->SetKernelArg(idx++, sizeof(SurfaceIndex), pSurfIndex));

m_wpOutputSurface[wpKrnIdx]->GetIndex(pSurfIndex);
CODECHAL_ENCODE_CHK_STATUS_RETURN(m_wpOutputSurface[wpKrnIdx]->GetIndex(pSurfIndex));
CODECHAL_ENCODE_CHK_STATUS_RETURN(m_cmKrn[wpKrnIdx]->SetKernelArg(idx++, sizeof(SurfaceIndex), pSurfIndex));

return MOS_STATUS_SUCCESS;
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14 changes: 7 additions & 7 deletions media_driver/agnostic/gen12/codec/hal/codechal_kernel_hme_mdf_g12.cpp
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Expand Up @@ -784,12 +784,12 @@ MOS_STATUS CodechalKernelHmeMdfG12::SetupKernelArgs(CmKernel *cmKrn)

if (m_32xMeInUse)
{
m_HME32xMVSurface->GetIndex(pSurfIndex);
CODECHAL_ENCODE_CHK_STATUS_RETURN(m_HME32xMVSurface->GetIndex(pSurfIndex));
YuvInfo = &m_HME32xYUVInfo;
}
else if (m_16xMeInUse)
{
m_HME16xMVSurface->GetIndex(pSurfIndex);
CODECHAL_ENCODE_CHK_STATUS_RETURN(m_HME16xMVSurface->GetIndex(pSurfIndex));
YuvInfo = &m_HME16xYUVInfo;
}
else
Expand All @@ -802,27 +802,27 @@ MOS_STATUS CodechalKernelHmeMdfG12::SetupKernelArgs(CmKernel *cmKrn)
if (m_16xMeInUse && Is32xMeEnabled())
{
// Pass 32x MV to 16x ME operation
m_HME32xMVSurface->GetIndex(pSurfIndex);
CODECHAL_ENCODE_CHK_STATUS_RETURN(m_HME32xMVSurface->GetIndex(pSurfIndex));

}
else if (Is16xMeEnabled() && !m_32xMeInUse)
{
// Pass 16x MV to 4x ME
m_HME16xMVSurface->GetIndex(pSurfIndex);
CODECHAL_ENCODE_CHK_STATUS_RETURN(m_HME16xMVSurface->GetIndex(pSurfIndex));
}
// else pass same surface index as dummy
cmKrn->SetKernelArg(idx++, sizeof(SurfaceIndex), pSurfIndex);

// Insert Distortion buffers only for 4xMe case
if (m_4xMeInUse && m_4xMeDistortionBufferSupported)
{
m_HME4xDistortionSurface->GetIndex(pSurfIndex);
CODECHAL_ENCODE_CHK_STATUS_RETURN(m_HME4xDistortionSurface->GetIndex(pSurfIndex));
}
cmKrn->SetKernelArg(idx++, sizeof(SurfaceIndex), pSurfIndex);

if (m_4xMeInUse && !m_surfaceParam.vdencStreamInEnabled)
{
m_surfaceParam.meBrcDistortionSurface->GetIndex(pSurfIndex);
CODECHAL_ENCODE_CHK_STATUS_RETURN(m_surfaceParam.meBrcDistortionSurface->GetIndex(pSurfIndex));
}
cmKrn->SetKernelArg(idx++, sizeof(SurfaceIndex), pSurfIndex);

Expand Down Expand Up @@ -852,7 +852,7 @@ MOS_STATUS CodechalKernelHmeMdfG12::SetupKernelArgs(CmKernel *cmKrn)

if (m_curbeParam.brcEnable && m_4xMeInUse)
{
m_SumMvandDistortionBuffer->GetIndex(pSurfIndex);
CODECHAL_ENCODE_CHK_STATUS_RETURN(m_SumMvandDistortionBuffer->GetIndex(pSurfIndex));
}
//set surface for Sum MV distortion buffer
cmKrn->SetKernelArg(idx++, sizeof(SurfaceIndex), pSurfIndex);
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4 changes: 2 additions & 2 deletions media_driver/agnostic/gen12/codec/hal/codechal_kernel_intra_dist_mdf_g12.cpp
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Expand Up @@ -199,10 +199,10 @@ MOS_STATUS CodechalKernelIntraDistMdfG12::SetupKernelArgs()
CODECHAL_ENCODE_CHK_STATUS_RETURN(SetIntraDistCurbe(curbe));
m_cmKrn->SetKernelArg(idx++, sizeof(curbe), &curbe);

m_src4xSurface->GetIndex(pSurfIndex);
CODECHAL_ENCODE_CHK_STATUS_RETURN(m_src4xSurface->GetIndex(pSurfIndex));
m_cmKrn->SetKernelArg(idx++, sizeof(SurfaceIndex), pSurfIndex);

m_surfaceParam.intraDistSurface->GetIndex(pSurfIndex);
CODECHAL_ENCODE_CHK_STATUS_RETURN(m_surfaceParam.intraDistSurface->GetIndex(pSurfIndex));
m_cmKrn->SetKernelArg(idx++, sizeof(SurfaceIndex), pSurfIndex);

m_cmKrn->SetKernelArg(idx++, sizeof(SurfaceIndex), m_vmeIdx);
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2 changes: 1 addition & 1 deletion media_driver/agnostic/gen12/codec/hal/codechal_vdenc_hevc_g12.h
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Expand Up @@ -2210,7 +2210,7 @@ class CodechalVdencHevcStateG12 : public CodechalVdencHevcState
bool m_forceScalability = false; //!< force scalability for resolution < 4K/5K if other checking for scalability passed

// HuC PAK stitch kernel
MOS_RESOURCE m_resHucStitchDataBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][CODECHAL_HEVC_MAX_NUM_BRC_PASSES]; // data buffer for huc input cmd generation
MOS_RESOURCE m_resHucStitchDataBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][CODECHAL_HEVC_MAX_NUM_BRC_PASSES] = {}; // data buffer for huc input cmd generation
MHW_BATCH_BUFFER m_HucStitchCmdBatchBuffer = {}; //!< SLB for huc stitch cmd

// virtual engine
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20 changes: 10 additions & 10 deletions media_driver/agnostic/gen12/codec/hal/codechal_vdenc_vp9_g12.h
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Expand Up @@ -1028,26 +1028,26 @@ class CodechalVdencVp9StateG12 : public CodechalVdencVp9State
bool m_isTilingSupported = false;
bool m_enableTileStitchByHW = true;
bool m_useVirtualEngine = true;
MOS_COMMAND_BUFFER m_veBatchBuffer[m_numUncompressedSurface][CODECHAL_ENCODE_VP9_MAX_NUM_HCP_PIPE][m_brcMaxNumPasses];
MOS_COMMAND_BUFFER m_realCmdBuffer;
MOS_COMMAND_BUFFER m_veBatchBuffer[m_numUncompressedSurface][CODECHAL_ENCODE_VP9_MAX_NUM_HCP_PIPE][m_brcMaxNumPasses] = {};
MOS_COMMAND_BUFFER m_realCmdBuffer = {};
uint32_t m_sizeOfVEBatchBuffer = 0;
uint8_t m_virtualEngineBBIndex = 0;
uint32_t m_32BlocksRasterized = 0;
CODECHAL_ENCODE_BUFFER m_tileRecordBuffer[m_numUncompressedSurface];
CODECHAL_ENCODE_BUFFER m_hcpScalabilitySyncBuffer;
CODECHAL_ENCODE_BUFFER m_tileRecordBuffer[m_numUncompressedSurface] = {};
CODECHAL_ENCODE_BUFFER m_hcpScalabilitySyncBuffer = {};

// Stats Integration regions
CODECHAL_ENCODE_BUFFER m_tileStatsPakIntegrationBuffer[m_numUncompressedSurface];
CODECHAL_ENCODE_BUFFER m_tileStatsPakIntegrationBuffer[m_numUncompressedSurface] = {};
uint32_t m_tileStatsPakIntegrationBufferSize = 0;
CODECHAL_ENCODE_BUFFER m_frameStatsPakIntegrationBuffer;
CODECHAL_ENCODE_BUFFER m_frameStatsPakIntegrationBuffer = {};
uint32_t m_frameStatsPakIntegrationBufferSize = 0;
MOS_RESOURCE m_hucPakIntDmemBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][m_brcMaxNumPasses];
MOS_RESOURCE m_hucPakIntDummyBuffer;
MOS_RESOURCE m_hucPakIntBrcDataBuffer;
MOS_RESOURCE m_hucPakIntDmemBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][m_brcMaxNumPasses] = {};
MOS_RESOURCE m_hucPakIntDummyBuffer = {};
MOS_RESOURCE m_hucPakIntBrcDataBuffer = {};
StatsInfo m_tileStatsOffset = {}; // Page aligned offsets for HuC PAK Integration kernel input
StatsInfo m_frameStatsOffset = {}; // Page aligned offsets for HuC PAK Integration kernel output
StatsInfo m_statsSize = {}; // Sizes for the stats for HuC PAK Integration kernel input
MHW_VDBOX_HUC_VIRTUAL_ADDR_PARAMS m_hpuVirtualAddrParams;
MHW_VDBOX_HUC_VIRTUAL_ADDR_PARAMS m_hpuVirtualAddrParams = {};
// Needed for WA, fix for hang during resolution change
uint16_t m_picWidthInMinBlk = 0; //!< Picture Width aligned to minBlock
uint16_t m_picHeightInMinBlk = 0; //!< Picture Height aligned to minBlock
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2 changes: 1 addition & 1 deletion media_driver/agnostic/gen12/hw/vdbox/mhw_vdbox_hcp_g12_X.cpp
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Expand Up @@ -4259,7 +4259,7 @@ MOS_STATUS MhwVdboxHcpInterfaceG12::AddHcpEncodeTileCodingCmd(
// By default enable bit stream offset when tile replay is enabled with multiple pipes;
// for single pipe case, by default set to 1, simulation currently can not support 0 for single pipe;
// To be followed and clarified
cmd.DW4.BitstreamByteOffsetEnable = params->bTileReplayEnable && ((params->NumberOfActiveBePipes > 1) ? 1 : 1);
cmd.DW4.BitstreamByteOffsetEnable = params->bTileReplayEnable;
if (params->presHcpSyncBuffer) // this buffer is not used in HEVC/VP9 decode or encode
{
PMOS_INTERFACE osInterface;
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