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[Decode] Use 64K contiguous pages for WA for scanout buffers
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* [Decode] Use 64K contiguous pages for WA for scanout buffers

This is kmd restriction for scanout buffers

The surface for display must create with scanout, otherwise leading
display failure.
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Jexu authored and intel-mediadev committed Nov 12, 2024
1 parent a8b5f4e commit 87b65f4
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Showing 4 changed files with 25 additions and 10 deletions.
12 changes: 11 additions & 1 deletion media_softlet/linux/common/ddi/media_libva_util_next.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -900,16 +900,24 @@ VAStatus MediaLibvaUtilNext::CreateInternalSurface(
unsigned int patIndex = MosInterface::GetPATIndexFromGmm(mediaDrvCtx->pGmmClientContext, gmmResourceInfo);
bool isCpuCacheable = gmmResourceInfo->GetResFlags().Info.Cacheable;

//This is wa for tile4 + compressed + scanout surface(!isCpuCacheable)
bool is64kPageAlignmentNeed =
MEDIA_IS_WA(&mediaDrvCtx->WaTable, WaTile4CompressScanoutSurf64KNeed)
&& gmmResourceInfo->GetResFlags().Info.Tile4
&& (gmmResourceInfo->GetResFlags().Info.MediaCompressed || gmmResourceInfo->GetResFlags().Info.RenderCompressed)
&& !isCpuCacheable;

if ( params.tileFormat == TILING_NONE )
{
struct mos_drm_bo_alloc alloc;
alloc.name = "Media";
alloc.size = gmmSize;
alloc.alignment = 4096;
alloc.alignment = is64kPageAlignmentNeed ? PAGE_SIZE_64K : PAGE_SIZE_4K;
alloc.ext.tiling_mode = TILING_NONE;
alloc.ext.mem_type = params.memType;
alloc.ext.pat_index = patIndex;
alloc.ext.cpu_cacheable = isCpuCacheable;
alloc.ext.scanout_surf = !isCpuCacheable;
bo = mos_bo_alloc(mediaDrvCtx->pDrmBufMgr, &alloc);
params.pitch = gmmPitch;
}
Expand All @@ -920,10 +928,12 @@ VAStatus MediaLibvaUtilNext::CreateInternalSurface(
alloc_tiled.x = gmmPitch;
alloc_tiled.y = (gmmSize + gmmPitch -1)/gmmPitch;
alloc_tiled.cpp = 1;
alloc_tiled.alignment = is64kPageAlignmentNeed ? PAGE_SIZE_64K : PAGE_SIZE_4K;
alloc_tiled.ext.tiling_mode = params.tileFormat;
alloc_tiled.ext.mem_type = params.memType;;
alloc_tiled.ext.pat_index = patIndex;
alloc_tiled.ext.cpu_cacheable = isCpuCacheable;
alloc_tiled.ext.scanout_surf = !isCpuCacheable;

bo = mos_bo_alloc_tiled(mediaDrvCtx->pDrmBufMgr, &alloc_tiled);
params.pitch = alloc_tiled.pitch;
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3 changes: 3 additions & 0 deletions media_softlet/linux/common/os/i915/include/mos_bufmgr_api.h
Original file line number Diff line number Diff line change
Expand Up @@ -134,6 +134,7 @@ enum device_type {
#define MEMZONE_PRIME_START (MEMZONE_DEVICE_START + MEMZONE_DEVICE_SIZE)
#define MEMZONE_PRIME_SIZE (1ull << 40)
#define MEMZONE_TOTAL (1ull << 48)
#define PAGE_SIZE_4K (1ull << 12)
#define PAGE_SIZE_64K (1ull << 16)
#define PAGE_SIZE_1M (1ull << 20)
#define PAGE_SIZE_2M (1ull << 21)
Expand Down Expand Up @@ -211,6 +212,7 @@ struct mos_drm_bo_alloc_ext{
int mem_type = 0;
uint16_t pat_index = PAT_INDEX_INVALID;
bool cpu_cacheable = true;
bool scanout_surf = false;
};

struct mos_drm_bo_alloc {
Expand Down Expand Up @@ -238,6 +240,7 @@ struct mos_drm_bo_alloc_tiled {
int y = 0;
int cpp = 0;
unsigned long pitch = 0;
unsigned int alignment = 0;

struct mos_drm_bo_alloc_ext ext;
};
Expand Down
16 changes: 8 additions & 8 deletions media_softlet/linux/common/os/xe/mos_bufmgr_xe.c
Original file line number Diff line number Diff line change
Expand Up @@ -84,7 +84,6 @@ typedef struct MOS_OCA_EXEC_LIST_INFO mos_oca_exec_list_info;

#include "mos_bufmgr_priv.h"

#define PAGE_SIZE_4K (1ull << 12)
#define MAX(a, b) ((a) > (b) ? (a) : (b))
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))

Expand Down Expand Up @@ -1186,12 +1185,12 @@ __mos_bo_set_offset_xe(MOS_LINUX_BO *bo)
else if (MEMZONE_DEVICE == bo_gem->mem_region)
{
alignment = MAX(bufmgr_gem->default_alignment[MOS_XE_MEM_CLASS_VRAM], PAGE_SIZE_64K);
offset = __mos_bo_vma_alloc_xe(bo->bufmgr, (enum mos_memory_zone)bo_gem->mem_region, bo->size, PAGE_SIZE_64K);
offset = __mos_bo_vma_alloc_xe(bo->bufmgr, (enum mos_memory_zone)bo_gem->mem_region, bo->size, alignment);
}
else if (MEMZONE_SYS == bo_gem->mem_region)
{
alignment = MAX(bufmgr_gem->default_alignment[MOS_XE_MEM_CLASS_SYSMEM], PAGE_SIZE_64K);
offset = __mos_bo_vma_alloc_xe(bo->bufmgr, (enum mos_memory_zone)bo_gem->mem_region, bo->size, PAGE_SIZE_64K);
offset = __mos_bo_vma_alloc_xe(bo->bufmgr, (enum mos_memory_zone)bo_gem->mem_region, bo->size, alignment);
}
else
{
Expand Down Expand Up @@ -1350,9 +1349,10 @@ mos_bo_alloc_xe(struct mos_bufmgr *bufmgr,
*/
create.cpu_caching = alloc->ext.cpu_cacheable ? DRM_XE_GEM_CPU_CACHING_WB : DRM_XE_GEM_CPU_CACHING_WC;

if ((strcmp(alloc->name, "MEDIA") == 0 || strcmp(alloc->name, "Media") == 0)
&& create.cpu_caching == DRM_XE_GEM_CPU_CACHING_WC)
create.flags |= DRM_XE_GEM_CREATE_FLAG_SCANOUT;
if (alloc->ext.scanout_surf)
{
create.flags |= DRM_XE_GEM_CREATE_FLAG_SCANOUT;
}

ret = drmIoctl(bufmgr_gem->fd,
DRM_IOCTL_XE_GEM_CREATE,
Expand Down Expand Up @@ -1470,12 +1470,12 @@ mos_bo_alloc_tiled_xe(struct mos_bufmgr *bufmgr,
unsigned long size, stride;
uint32_t tiling;

uint32_t alignment = bufmgr_gem->default_alignment[MOS_XE_MEM_CLASS_SYSMEM];
uint32_t alignment = MAX(alloc_tiled->alignment, bufmgr_gem->default_alignment[MOS_XE_MEM_CLASS_SYSMEM]);

if (bufmgr_gem->has_vram &&
(MOS_MEMPOOL_VIDEOMEMORY == alloc_tiled->ext.mem_type || MOS_MEMPOOL_DEVICEMEMORY == alloc_tiled->ext.mem_type))
{
alignment = bufmgr_gem->default_alignment[MOS_XE_MEM_CLASS_VRAM];
alignment = MAX(alloc_tiled->alignment, bufmgr_gem->default_alignment[MOS_XE_MEM_CLASS_VRAM]);
}

do {
Expand Down
4 changes: 3 additions & 1 deletion media_softlet/linux/xe2_hpm/ddi/media_sku_wa_bmg.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -279,7 +279,9 @@ static bool InitBmgMediaWaExt(struct GfxDeviceInfo *devInfo,
CPU blt call will add/remove padding on the platform*/
MEDIA_WR_WA(waTable, WaDisableGmmLibOffsetInDeriveImage, 1);


// This requirement comes from XE KMD for tile4 + compress + scanout surface
// Currently, it only applies to xe2 dgpu
MEDIA_WR_WA(waTable, WaTile4CompressScanoutSurf64KNeed , 1);

/* Turn off MMC for codec, need to remove once turn it on */
MEDIA_WR_WA(waTable, WaDisableCodecMmc, 0);
Expand Down

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