LLVM and SPIRV-LLVM-Translator pulldown (WW32) #10783
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When compiling against recent glibc (>= 2.35) but old kernel headers (< 4.18), `SYS_rseq` is not defined and thus llvm-exegesis fails to build. So also check that `SYS_rseq` is defined before trying to use it. Fixes llvm/llvm-project#64456 Reviewed By: MaskRay, gchatelet Differential Revision: https://reviews.llvm.org/D157189
We currently only enable hoisting in the last SimplifyCFG run of the function simplification pipeline. In particular this happens after GVN, which means that instructions that were identical (and thus hoistable) prior to GVN might no longer be so after it ran, due to equality replacements (see the phase ordering test). The history here is that D84108 restricted hoisting to the very late (module optimization) pipeline only. Then D101468 went back on that, and also performed it at the end of function simplification. This patch goes one step further and allows it prior to GVN. Importantly, we still don't perform hoisting before LoopRotate, which was the original motivation for delaying it. Differential Revision: https://reviews.llvm.org/D156532
As pointed out in D125755 the operand of a call to getCastInstrCost had the Src and Dst the wrong way around. Differential Revision: https://reviews.llvm.org/D154841
…ATE widening With SSSE3, widen the truncation for anything other than vXi64 -> vXi8 smaller than v8i64 (where PSHUFB would be better).
Differential Revision: https://reviews.llvm.org/D157256
…ions. The modeling of send, recv, sendmsg, recvmsg, sendto, recvfrom is changed: These functions do not return 0, except if the message length is 0. (In sendmsg, recvmsg the length is not checkable but it is more likely that a message with 0 length is invalid for these functions.) Reviewed By: donat.nagy Differential Revision: https://reviews.llvm.org/D155715
This has failed once in a while on our Windows on Arm bot: https://lab.llvm.org/buildbot/#/builders/219/builds/4688 Traceback (most recent call last): File "C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\... self.assertGreaterEqual(duration_sec, 1) AssertionError: 0.9907491207122803 not greater than or equal to 1 We're not here to check that Python/the C++ lib/the OS implemented timers correctly, so accept anything 0.95 or greater.
…calling conventions in C++ As reported in <llvm/llvm-project#58929>, Clang's handling of empty structs in the case of small structs that may be eligible to be passed using the hard FP calling convention doesn't match g++. In general, C++ record fields are never empty unless [[no_unique_address]] is used, but the RISC-V FP ABI overrides this. After this patch, fields of structs that contain empty records will be ignored, even in C++, when considering eligibility for the FP calling convention ('flattening'). It isn't explicitly noted in the RISC-V psABI, but arrays of empty records will disqualify a struct for consideration of using the FP calling convention in g++. This patch matches that behaviour. The psABI issue <riscv-non-isa/riscv-elf-psabi-doc#358> seeks to clarify this. This patch was previously committed but reverted after a bug was found. This recommit adds additional logic to prevent that bug (adding an extra check for when a candidate from detectFPCCEligibleStructHelper may not be valid). Differential Revision: https://reviews.llvm.org/D142327
This allows using VPRecipeWithIRFlags for VPInstruction and reduces the diff for D157144 & D157194.
Currently we only consider basic blocks with a unique predecessor when estimating the size of dead code. However, we could expand to this to consider blocks with a back-edge, or blocks preceded by dead blocks. Differential Revision: https://reviews.llvm.org/D156903
This ports over the test cases half-convert.ll and implements patterns or RISCVISelLowering.cpp changes for all of the most straight-forward cases (those that don't require changes outside of lib/Target/RISCV). The remaining cases and noted poor codegen for saturating conversions will be handled in follow-up patches. Differential Revision: https://reviews.llvm.org/D156943
This patch moves directive sets defined internally in Semantics to a header accessible by other stages of the compiler to enable reuse. Some sets are renamed/rearranged and others are lifted from local definitions to provide a single source of truth. Differential Revision: https://reviews.llvm.org/D157090
…nversion Extending to f32 first (as is done for f16) results in better generated code for RISC-V (and affects no other in-tree tests). Additionally, performing the FP_EXTEND first seems equally justified for bf16 as for f16. Differential Revision: https://reviews.llvm.org/D156944
In most of testcases, it usually has a blank line after end of RUN lines for readability.
This reduces the number of places where we have to check for a list of DS_GWS_* opcodes. Differential Revision: https://reviews.llvm.org/D157099
The affected lit tests failed when they were run in a path that contained the word "call". CHECK-NOT lines that were supposed to match only the IR ended up matching the path printed in the output. Fixed this by checking for "call void" instead.
Reviewed By: aaron.ballman Differential Revision: https://reviews.llvm.org/D152141
Split off suggested refactoring from D157144. Also adds a assert to make sure this is only used when OpType is FPMathOp.
6640df9 did not actually remove it, just its final user. cannotBeOrderedLessThanZeroImpl still has a user which needs to be updated before it can be removed. The users of SignBitMustBeZero currently have broken expectations for nan handling, so requires more work to replace.
Reviewed By: DavidSpickett Differential Revision: https://reviews.llvm.org/D157214
Currently `isTriviallyReMaterializable` calls `isReallyTriviallyReMaterializable` and `isReallyTriviallyReMaterializableGeneric`. The two interfaces are confusing, but there are also some real issues with this. The documentation of this function (see below) suggests that `isReallyTriviallyRematerializable` allows the target to override the default behaviour. /// For instructions with opcodes for which the M_REMATERIALIZABLE flag is /// set, this hook lets the target specify whether the instruction is actually /// trivially rematerializable, taking into consideration its operands. It however implements something different. The default behaviour is the analysis done in `isReallyTriviallyReMaterializableGeneric`, which is testing if it is safe to rematerialize the MachineInstr. The result of `isReallyTriviallyReMaterializable` is only considered if `isReallyTriviallyReMaterializableGeneric` returns `false`. That means there is no way to override the default behaviour if `isReallyTriviallyReMaterializableGeneric` returns true (i.e. it is safe to rematerialize, but we'd rather not). By making this a single interface, we can override the interface to do either. Reviewed By: craig.topper, nemanjai Differential Revision: https://reviews.llvm.org/D156520
…s for PACKSS/PACKUS Begin to consolidate the similar matching code we have - all have semi-similar constraints that still need merging together to ensure we get consistent codegen depending on when the truncate is lowered.
…vector types Fuzz testing noticed that the sub-128-bit vector splitting added in ef4330f didn't correctly halt at <2 x iXX> truncations.
As requested in review for https://reviews.llvm.org/D156990 This additionally consistently uses the ilp32d/lp64d ABIs when the D extension is enabled.
redundant get() call on smart pointer.
Support IR that is generated by the vector-to-scf lowering of 2D vector transfers with a mask. Only 2D transfers that were fully unrolled are supported at the moment. Differential Revision: https://reviews.llvm.org/D156695
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This reverts commit d885138. Reason: Applied the fix for the Asan buildbot failures.
…_READY Revert"[llvm] Drop some typed pointer handling/bitcasts" This reverts commit 4ce7c4a. Conflicts: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/lib/Transforms/Coroutines/CoroSplit.cpp llvm/lib/Transforms/Scalar/LICM.cpp llvm/lib/Transforms/Scalar/SROA.cpp Revert "[SCEVExpander] Remove GEP add rec splitting code (NFCI)" This reverts commit b752542. Revert "[Transforms] Remove FactorOutConstant to fix -Wunneeded-internal-declaration (NFC)" This reverts commit 67f1e8d. Revert "[SCEVExpander] Remove typed pointer support (NFC)" This reverts commit 02ba405.
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This reverts commit 5b5bd81.
This was referenced Aug 14, 2023
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@intel/dpcpp-clang-driver-reviewers @intel/dpcpp-cfe-reviewers @intel/dpcpp-spirv-reviewers Please review. @bader . @intel/llvm-gatekeepers OK to merge? Thanks. |
I'm not aware of that, did you mean to ping someone else? |
Oops, sorry, tagged wrong id. I meant the work being done by @vmaksimo |
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/merge |
bb-sycl
approved these changes
Aug 16, 2023
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Wed 16 Aug 2023 09:52:20 PM UTC --- Start to merge the commit into sycl branch. It will take several minutes. |
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Wed 16 Aug 2023 09:57:02 PM UTC --- Merge the branch in this PR to base automatically. Will close the PR later. |
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LLVM: llvm/llvm-project@920c461
SPIRV-LLVM-Translator: KhronosGroup/SPIRV-LLVM-Translator@bb2196b