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Merge pull request #26 from imahjoub/Implement_CddI2c
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Implement cdd i2c
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@imahjoub
imahjoub authored Jul 24, 2024
2 parents 12416f5 + 4148447 commit 5f9924d
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12 changes: 3 additions & 9 deletions README.md
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Expand Up @@ -19,21 +19,15 @@ STM32F446_FlashMaster is a baremetal project that uses the STM32F446RE microcont

## Devices Used

- **STM32F446RE**: ARM Cortex-M4 microcontroller.
- **IS25LP128F** : NOR flash chip for data storage.
- **SerLCD** : I2C-controlled LCD display.
- **STM32F446RE**: NUCLEO-F446RE Development Board.
- **IS25LP128F** : Serial Flash Memory.
- **SerLCD** : SparkFun 20x4 SerLCD

## Project Goals
TBD

## Getting Started

### Prerequisites

- NUCLEO-F446RE Development Board
- IS25LP128F Serial Flash Memory
- SparkFun 20x4 SerLCD

### Setup & Communication Protocols

1. Connect the IS25LP128F flash memory to the STM32F446RE using SPI (PA5, PA6, PA7).
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32 changes: 6 additions & 26 deletions Src/App/App.c
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@@ -1,15 +1,9 @@
#include <stdint.h>
#include <string.h>
#include <stdbool.h>

#include <Mcal/Mcu.h>
#include <Mcal/SysTick.h>
#include <Mcal/Reg.h>
#include <OS/OS.h>
#include <Util/UtilTimer.h>

#include <Cdd/CddI2c/CddI2c.h>
#include <Cdd/CddSerLCD/CddSerLCD_I2c.h>
#include <Cdd/CddSpi/CddSpi.h>

extern bool AppShape_CheckCircle(void);

Expand All @@ -24,25 +18,11 @@ int main(void)

(void) AppShape_CheckCircle();

/* Initialize I2C1 */
CddI2c_Init();
CddSerLCD_I2c_Init();

for(;;)
{
CddSerLCD_I2c_SendCommand(CDD_SERLCD_CLEAR_DISPLAY);
/* Delay to ensure the clear command is processed */
CddSerLcd_I2c_msDelays(5U);
CddSerLCD_I2c_PrintString("Hello");
CddSerLcd_I2c_msDelays(2000U);

CddSerLCD_I2c_SendCommand(CDD_SERLCD_CLEAR_DISPLAY);
/* Delay to ensure the clear command is processed */
CddSerLcd_I2c_msDelays(5U);
CddSerLCD_I2c_PrintString("World");
CddSerLcd_I2c_msDelays(2000U);

}
/* Initialize the OS. This calls the task init-functions one time only */
OS_Init();

/* Start the cooperative multitasking scheduler */
OS_Start();

return 0;
}
9 changes: 6 additions & 3 deletions Src/App/OS/OS_Cfg.h
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Expand Up @@ -9,18 +9,21 @@
extern void Task01_Init(void);
extern void Task02_Init(void);
extern void Task03_Init(void);
extern void Task04_Init(void);

extern void Task01_Func(void);
extern void Task02_Func(void);
extern void Task03_Func(void);
extern void Task04_Func(void);

#define OS_CFG_TASK_LIST_ENTRY(init, func, t0, cycle) { (init), (func), (t0), (cycle) }

#define OS_CFG_TASK_LIST_INIT \
{ \
OS_CFG_TASK_LIST_ENTRY(Task01_Init, Task01_Func, 0U, 17U), \
OS_CFG_TASK_LIST_ENTRY(Task02_Init, Task02_Func, 3U, 229U), \
OS_CFG_TASK_LIST_ENTRY(Task03_Init, Task03_Func, 7U, 514U) \
OS_CFG_TASK_LIST_ENTRY(Task01_Init, Task01_Func, 0U, 17U), \
OS_CFG_TASK_LIST_ENTRY(Task02_Init, Task02_Func, 3U, 229U), \
OS_CFG_TASK_LIST_ENTRY(Task03_Init, Task03_Func, 7U, 514U), \
OS_CFG_TASK_LIST_ENTRY(Task04_Init, Task04_Func, 12U, 799U) \
}

#if defined(__cplusplus)
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48 changes: 47 additions & 1 deletion Src/App/OS/OS_Task.c
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Expand Up @@ -2,15 +2,18 @@
#include <string.h>

#include <Cdd/CddExtFlash/CddExtFlash.h>
#include <Cdd/CddSerLCD/CddSerLCD_I2c.h>
#include <Cdd/CddSerLCD/CddSerLCD_Spi.h>
#include <Cdd/CddI2c/CddI2c.h>
#include <Cdd/CddSpi/CddSpi.h>
#include <Mcal/Mcu.h>
#include <Mcal/Reg.h>
#include <Util/UtilTimer.h>

//#define OS_TASK_USE_LED
//#define OS_TASK_USE_FLASH
#define OS_TASK_USE_SERLCD
//#define OS_TASK_USE_SERLCD_SPI
#define OS_TASK_USE_SERLCD_I2C

CddExtFlash_PageType AppPage;

Expand Down Expand Up @@ -103,20 +106,25 @@ void Task02_Func(void)


/************************* TASK3 *********************************/
#if defined(OS_TASK_USE_SERLCD_SPI)
static uint64_t TaskTimer03;
static const char HelloWorldString01[] = "Flash Master";
static const char HelloWorldString02[] = " ";
static const char HelloWorldString03[] = "STM32F446 ";
#endif

void Task03_Init(void);
void Task03_Func(void);

void Task03_Init(void)
{
#if defined(OS_TASK_USE_SERLCD_SPI)
#endif
}

void Task03_Func(void)
{
#if defined(OS_TASK_USE_SERLCD_SPI)
static uint8_t LineIndex;
static uint8_t StringIndex;

Expand Down Expand Up @@ -147,4 +155,42 @@ void Task03_Func(void)
StringIndex = 0U;
}
}
#endif
}

/************************* TASK4 *********************************/
void Task04_Init(void);
void Task04_Func(void);

void Task04_Init(void)
{
#if defined(OS_TASK_USE_SERLCD_I2C)

/* Initialize I2C1 */
CddI2c_Init();
CddSerLCD_I2c_Init();

#endif
}

void Task04_Func(void)
{
#if defined(OS_TASK_USE_SERLCD_I2C)

CddSerLCD_I2c_SendCommand(CDD_SERLCD_CLEAR_DISPLAY);
/* Delay to ensure the clear command is processed */
CddSerLcd_I2c_msDelays(5U);
CddSerLCD_I2c_PrintString("Hello");
CddSerLcd_I2c_msDelays(2000U);

CddSerLCD_I2c_SendCommand(CDD_SERLCD_CLEAR_DISPLAY);
/* Delay to ensure the clear command is processed */
CddSerLcd_I2c_msDelays(5U);
CddSerLCD_I2c_PrintString("World");
CddSerLcd_I2c_msDelays(2000U);

#endif
}



12 changes: 6 additions & 6 deletions Src/Cdd/CddSerLCD/CddSerLCD_I2c.c
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Expand Up @@ -13,21 +13,21 @@ void CddSerLcd_I2c_msDelays(const unsigned ms_count)
}
}

void CddSerLCD_I2c_PrintString(char* Str)
void CddSerLCD_I2c_PrintString(char* StringToPrint)
{
CddI2c_StartTransmission(CDD_SERLCD_ADDRESS, 0);

while (*Str)
while (*StringToPrint)
{
CddI2c_TransferSingleByte((uint8_t)(*Str));
++Str;
CddI2c_TransferSingleByte((uint8_t)(*StringToPrint));
++StringToPrint;
}

CddI2c_Stop();
}


void CddSerLCD_I2c_SendCommand(uint8_t command)
void CddSerLCD_I2c_SendCommand(uint8_t Command)
{
/* Start, set slave address to write */
CddI2c_StartTransmission(CDD_SERLCD_ADDRESS, 0U);
Expand All @@ -36,7 +36,7 @@ void CddSerLCD_I2c_SendCommand(uint8_t command)
CddI2c_TransferSingleByte(CDD_SERLCD_SETTING_MODE);

/* Send the command */
CddI2c_TransferSingleByte(command);
CddI2c_TransferSingleByte(Command);

/* Stop condition */
CddI2c_Stop();
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119 changes: 9 additions & 110 deletions Src/Mcal/Reg.h
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Expand Up @@ -33,107 +33,6 @@
volatile uint32_t STIR; /* Offset: 0xE00 ( /W) Software Trigger Interrupt Register */
} NVIC_Type;

/* TBD: delete this enum and use own code*/
typedef enum
{
/****** Cortex-M4 Processor Exceptions Numbers ****************************************************************/
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M4 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M4 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M4 Usage Fault Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M4 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M4 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M4 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M4 System Tick Interrupt */
/****** STM32 specific Interrupt Numbers **********************************************************************/
WWDG_IRQn = 0, /*!< Window WatchDog Interrupt */
PVD_IRQn = 1, /*!< PVD through EXTI Line detection Interrupt */
TAMP_STAMP_IRQn = 2, /*!< Tamper and TimeStamp interrupts through the EXTI line */
RTC_WKUP_IRQn = 3, /*!< RTC Wakeup interrupt through the EXTI line */
FLASH_IRQn = 4, /*!< FLASH global Interrupt */
RCC_IRQn = 5, /*!< RCC global Interrupt */
EXTI0_IRQn = 6, /*!< EXTI Line0 Interrupt */
EXTI1_IRQn = 7, /*!< EXTI Line1 Interrupt */
EXTI2_IRQn = 8, /*!< EXTI Line2 Interrupt */
EXTI3_IRQn = 9, /*!< EXTI Line3 Interrupt */
EXTI4_IRQn = 10, /*!< EXTI Line4 Interrupt */
DMA1_Stream0_IRQn = 11, /*!< DMA1 Stream 0 global Interrupt */
DMA1_Stream1_IRQn = 12, /*!< DMA1 Stream 1 global Interrupt */
DMA1_Stream2_IRQn = 13, /*!< DMA1 Stream 2 global Interrupt */
DMA1_Stream3_IRQn = 14, /*!< DMA1 Stream 3 global Interrupt */
DMA1_Stream4_IRQn = 15, /*!< DMA1 Stream 4 global Interrupt */
DMA1_Stream5_IRQn = 16, /*!< DMA1 Stream 5 global Interrupt */
DMA1_Stream6_IRQn = 17, /*!< DMA1 Stream 6 global Interrupt */
ADC_IRQn = 18, /*!< ADC1, ADC2 and ADC3 global Interrupts */
CAN1_TX_IRQn = 19, /*!< CAN1 TX Interrupt */
CAN1_RX0_IRQn = 20, /*!< CAN1 RX0 Interrupt */
CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */
CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */
EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */
TIM1_BRK_TIM9_IRQn = 24, /*!< TIM1 Break interrupt and TIM9 global interrupt */
TIM1_UP_TIM10_IRQn = 25, /*!< TIM1 Update Interrupt and TIM10 global interrupt */
TIM1_TRG_COM_TIM11_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt and TIM11 global interrupt */
TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */
TIM2_IRQn = 28, /*!< TIM2 global Interrupt */
TIM3_IRQn = 29, /*!< TIM3 global Interrupt */
TIM4_IRQn = 30, /*!< TIM4 global Interrupt */
I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */
I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */
I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */
I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */
SPI1_IRQn = 35, /*!< SPI1 global Interrupt */
SPI2_IRQn = 36, /*!< SPI2 global Interrupt */
USART1_IRQn = 37, /*!< USART1 global Interrupt */
USART2_IRQn = 38, /*!< USART2 global Interrupt */
USART3_IRQn = 39, /*!< USART3 global Interrupt */
EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
RTC_Alarm_IRQn = 41, /*!< RTC Alarm (A and B) through EXTI Line Interrupt */
OTG_FS_WKUP_IRQn = 42, /*!< USB OTG FS Wakeup through EXTI line interrupt */
TIM8_BRK_TIM12_IRQn = 43, /*!< TIM8 Break Interrupt and TIM12 global interrupt */
TIM8_UP_TIM13_IRQn = 44, /*!< TIM8 Update Interrupt and TIM13 global interrupt */
TIM8_TRG_COM_TIM14_IRQn = 45, /*!< TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt */
TIM8_CC_IRQn = 46, /*!< TIM8 Capture Compare global interrupt */
DMA1_Stream7_IRQn = 47, /*!< DMA1 Stream7 Interrupt */
FMC_IRQn = 48, /*!< FMC global Interrupt */
SDIO_IRQn = 49, /*!< SDIO global Interrupt */
TIM5_IRQn = 50, /*!< TIM5 global Interrupt */
SPI3_IRQn = 51, /*!< SPI3 global Interrupt */
UART4_IRQn = 52, /*!< UART4 global Interrupt */
UART5_IRQn = 53, /*!< UART5 global Interrupt */
TIM6_DAC_IRQn = 54, /*!< TIM6 global and DAC1&2 underrun error interrupts */
TIM7_IRQn = 55, /*!< TIM7 global interrupt */
DMA2_Stream0_IRQn = 56, /*!< DMA2 Stream 0 global Interrupt */
DMA2_Stream1_IRQn = 57, /*!< DMA2 Stream 1 global Interrupt */
DMA2_Stream2_IRQn = 58, /*!< DMA2 Stream 2 global Interrupt */
DMA2_Stream3_IRQn = 59, /*!< DMA2 Stream 3 global Interrupt */
DMA2_Stream4_IRQn = 60, /*!< DMA2 Stream 4 global Interrupt */
CAN2_TX_IRQn = 63, /*!< CAN2 TX Interrupt */
CAN2_RX0_IRQn = 64, /*!< CAN2 RX0 Interrupt */
CAN2_RX1_IRQn = 65, /*!< CAN2 RX1 Interrupt */
CAN2_SCE_IRQn = 66, /*!< CAN2 SCE Interrupt */
OTG_FS_IRQn = 67, /*!< USB OTG FS global Interrupt */
DMA2_Stream5_IRQn = 68, /*!< DMA2 Stream 5 global interrupt */
DMA2_Stream6_IRQn = 69, /*!< DMA2 Stream 6 global interrupt */
DMA2_Stream7_IRQn = 70, /*!< DMA2 Stream 7 global interrupt */
USART6_IRQn = 71, /*!< USART6 global interrupt */
I2C3_EV_IRQn = 72, /*!< I2C3 event interrupt */
I2C3_ER_IRQn = 73, /*!< I2C3 error interrupt */
OTG_HS_EP1_OUT_IRQn = 74, /*!< USB OTG HS End Point 1 Out global interrupt */
OTG_HS_EP1_IN_IRQn = 75, /*!< USB OTG HS End Point 1 In global interrupt */
OTG_HS_WKUP_IRQn = 76, /*!< USB OTG HS Wakeup through EXTI interrupt */
OTG_HS_IRQn = 77, /*!< USB OTG HS global interrupt */
DCMI_IRQn = 78, /*!< DCMI global interrupt */
FPU_IRQn = 81, /*!< FPU global interrupt */
SPI4_IRQn = 84, /*!< SPI4 global Interrupt */
SAI1_IRQn = 87, /*!< SAI1 global Interrupt */
SAI2_IRQn = 91, /*!< SAI2 global Interrupt */
QUADSPI_IRQn = 92, /*!< QuadSPI global Interrupt */
CEC_IRQn = 93, /*!< CEC global Interrupt */
SPDIF_RX_IRQn = 94, /*!< SPDIF-RX global Interrupt */
FMPI2C1_EV_IRQn = 95, /*!< FMPI2C1 Event Interrupt */
FMPI2C1_ER_IRQn = 96 /*!< FMPI2C1 Error Interrupt */
} IRQn_Type;

/* ----------------------------------------------------------------------------------- */
/* Macros */
/* ----------------------------------------------------------------------------------- */
Expand Down Expand Up @@ -255,15 +154,15 @@
#define DMA2_STREAM3 ((DMA_Stream_TypeDef*) DMA2_STREAM3_BASE)


/* TBD delete the following code and use own macros */
// #define NVIC_EnableIRQ __NVIC_EnableIRQ
/* TBD get DMA working and delete the following */
// #define NVIC_EnableIRQ __NVIC_EnableIRQ

// static inline void __NVIC_EnableIRQ(IRQn_Type IRQn)
// {
// if((int32_t)(IRQn) >= 0)
// {
// NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
// }
// }
// static inline void __NVIC_EnableIRQ(IRQn_Type IRQn)
// {
// if((int32_t)(IRQn) >= 0)
// {
// NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
// }
// }

#endif /* REG_2023_08_26_H */

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