Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

uf/#57-fixLineTypeMismatch #79

Draft
wants to merge 7 commits into
base: main
Choose a base branch
from
Draft

Conversation

Utkarsha-dev05
Copy link

@Utkarsha-dev05 Utkarsha-dev05 commented Sep 8, 2021

Resolves #57

@codecov
Copy link

codecov bot commented Sep 8, 2021

Codecov Report

Merging #79 (e7e739b) into main (70c1602) will decrease coverage by 0.06%.
The diff coverage is n/a.

❗ Current head e7e739b differs from pull request most recent head 8768218. Consider uploading reports for the commit 8768218 to get more accurate results
Impacted file tree graph

@@            Coverage Diff             @@
##             main      #79      +/-   ##
==========================================
- Coverage   62.21%   62.15%   -0.07%     
==========================================
  Files          69       69              
  Lines        1985     1971      -14     
  Branches       14       14              
==========================================
- Hits         1235     1225      -10     
+ Misses        750      746       -4     
Impacted Files Coverage Δ
...scala/edu/ie3/simbench/convert/LineConverter.scala 87.50% <0.00%> (ø)
...ie3/simbench/convert/types/LineTypeConverter.scala 100.00% <0.00%> (+13.79%) ⬆️

Continue to review full report at Codecov.

Legend - Click here to learn more
Δ = absolute <relative> (impact), ø = not affected, ? = missing data
Powered by Codecov. Last update 70c1602...8768218. Read the comment docs.

@Utkarsha-dev05 Utkarsha-dev05 changed the title config file for 1-EHVHV-mixed-all-0-no_sw uf/#57-fixLineTypeMismatch Dec 6, 2021
Copy link
Member

@ckittl ckittl left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Additionally, I would wish for an integration test, that checks, what you have fixed. So having two source lines with the same type, but different voltage level and then checking if the right ones are selected.

- Basic functionality to convert SimBench data sets to [PowerSystemDataModel](https://github.com/ie3-institute/powersystemdatamodel)

### Changed
- Line type can be mapped to more than one vRated voltage.
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

The CHANGELOG should be cumulative. That means, that you please keep, what is written under [1.0.0] and add your Changed part beneath Unreleased

@@ -0,0 +1,26 @@
io {
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Please remove the config. Those files should be kept locally.

nodes: Map[Node, NodeInput]
): Vector[LineInput] =
inputs.par.flatMap {
case acLine: Line.ACLine =>
val (nodeA, nodeB) =
NodeConverter.getNodes(acLine.nodeA, acLine.nodeB, nodes)
val lineType = types.getOrElse(
acLine.lineType,
(acLine.lineType, Quantities.getQuantity(acLine.nodeA.vmR, KILOVOLT)),
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Here we use a composite key to access a map. However, the second part (the voltage) is set up from Doubles. Thus, it could be error prone. Maybe you may add a warning comment, that this only works, if you don't do any calculations with the voltage, that you provide here.

@@ -322,7 +322,7 @@ final case class SimbenchReader(
read(clazz, fields)
}
),
Duration("10 s")
Duration("100 s")
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Please don't commit this, as it was just an adaption to make it run on your PC.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

Wrong line type selected
2 participants