RVV support qd8-f32-qc8w-gemm/igemm and qd8-f32-qc4w-gemm #7932
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| @@ -277,254 +277,6 @@ std::vector<GemmTestParams> CreateTests1( | |||
| return gemm_tests; | |||
| } | |||
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| #if XNN_ENABLE_RISCV_VECTOR && XNN_ARCH_RISCV | |||
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We don't need the separate test version here, just declare nr properly in the test case as below.
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This is generated code, the generator needs to be fixed instead.
BTW, this was missed in a previous review as well. I tried to fix it in #7888, but the newly generated tests are failing. Can you please take a look? You'll have to fix this in order to address this anyways.
| @@ -3851,3 +3851,50 @@ INSTANTIATE_TEST_SUITE_P( | |||
| return info.param.test_name; | |||
| }); | |||
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| #if XNN_ARCH_RISCV && XNN_ENABLE_RISCV_VECTOR | |||
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I thought I had committed this and below in a previous PR, but clearly not. Including now,
| @@ -0,0 +1,116 @@ | |||
| // Auto-generated file. Do not edit! | |||
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Support for this was already included within src/qs8-igemm/rvv.c.in in a previous PR. No changes required.
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@dsharlet please review. Thank you.
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| @@ -277,254 +277,6 @@ std::vector<GemmTestParams> CreateTests1( | |||
| return gemm_tests; | |||
| } | |||
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| #if XNN_ENABLE_RISCV_VECTOR && XNN_ARCH_RISCV | |||
There was a problem hiding this comment.
This is generated code, the generator needs to be fixed instead.
BTW, this was missed in a previous review as well. I tried to fix it in #7888, but the newly generated tests are failing. Can you please take a look? You'll have to fix this in order to address this anyways.
| src/qd8-f32-qc8w-igemm/gen/qd8-f32-qc8w-igemm-3x4v-minmax-rvv.c | ||
| src/qd8-f32-qc8w-igemm/gen/qd8-f32-qc8w-igemm-5x4v-minmax-rvv.c | ||
| src/qd8-f32-qc8w-igemm/gen/qd8-f32-qc8w-igemm-6x4v-minmax-rvv.c | ||
| src/qd8-f32-qc8w-igemm/gen/qd8-f32-qc8w-igemm-7x4v-minmax-rvv.c |
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.bzl file needs updating as well. This (and the .bzl files) are generated code, see file header for details (tools/update-microkernels.py)
Add RVV production support for qd8-f32-qc8w-gemm/igemm
Add RVV production support for qd8-f32-qc4w-gemm
Add RVV test cases for qs8-qc8w-gemm/igemm missing from previous PR.